Datasheet

RT
to Clock
1
ARTN
R
T
Synch
Pulse
LM5072
100 pF
16
LM5072
www.ti.com SNVS437D –MARCH 2006–REVISED APRIL 2013
Figure 30. Oscillator Synchronization Implementation
Special attention should be paid to the relationship between the oscillator frequency and the PWM switching
frequency. For the LM5072-50 version, the programmed oscillator frequency is internally divided by two in order
to facilitate the 50% duty cycle limit. The PWM output switching frequency is therefore one half of the
programmed oscillator frequency. The frequency divider is not used in the LM5072-80 and therefore the PWM
output frequency is the same as the oscillator frequency. These relationships also apply to external
synchronization frequency versus PWM output frequency.
PWM Comparator / Slope Compensation
The PWM comparator produces the PWM duty cycle by comparing the current sense ramp signal with an error
voltage derived from the error amplifier output. The error amplifier output voltage at the COMP pin is offset by
1.4V and then further attenuated by a 3:1 resistor divider before it is presented to the PWM comparator input.
The PWM duty cycle increases with the voltage at the COMP pin. The controller output duty cycle reduces to
zero when the COMP pin voltage drops below approximately 1.4V.
For duty cycles greater than 50%, current mode control loops are subject to sub-harmonic oscillation. This
instability can be eliminated by adding an additional fixed slope voltage ramp signal to the current sense signal.
This technique is commonly known as “slope compensation”. For the LM5072-80 version with its maximum duty
cycle of 80%, slope compensation is integrated by injecting a 45 μA current ramp from the oscillator into the
current sense signal path (see Figure 15). The 45 μA peak ramping current flows through an internal 2 kΩ
resistor to produce a fixed voltage ramp at the PWM comparator input. Additional slope compensation may be
added by increasing the source impedance of the current sense signal with an external resistor between the CS
pin and the source of the current sense signal. The feature is disabled for the LM5072-50 version because the
duty cycle is limited to 50% and slope compensation is not required.
Thermal Protection
The LM5072 includes internal thermal shutdown circuitry to protect the IC in the event the maximum junction
temperature is exceeded. This circuit prevents catastrophic overheating due to accidental overload of the hot
swap MOSFET or other circuitry. Typically, thermal shutdown is activated at 165°C, causing the hot swap
MOSFET and classification regulator to be disabled. The PWM controller is disabled after the PGOOD timer has
expired. Thermal limit is not enabled unless the module is being powered through the front end and the hot swap
MOSFET is enhanced. V
CC
current limit provides an adequate level of protection for this 15 mA regulator. The
thermal protection is non-latching, therefore after the temperature drops by the 25°C nominal hysteresis, the hot
swap MOSFET is re-activated and a soft-start is initiated to restore the LM5072 to normal operation. If the cause
of overheating has not been eliminated, the circuit will hiccup in and out of the thermal shutdown mode.
PCB Layout Guidelines
Before processing the Printed Circuit Board (PCB) layout, the engineer should make all necessary adjustments
to the schematic to suite the application. The reader may notice that the LM5072 evaluation board is designed
with dual outputs, both FAUX and RAUX power options, and some re-configuration flexibility features (refer to
Figure 32). However, many devices can be removed for a particular application. Recommendations on
simplifying Figure 32 to suit a given application are as follows:
1. When selecting the FAUX power option only, delete C3, D1, D2, J3, P3, P4, R1, R2, R13, and R29.
2. When selecting the RAUX power option only, delete R30, D3, D7, J2, P1, P2 and R6.
3. When neither FAUX nor RAUX power options are selected, delete all the parts mentioned in (1) and (2)
above.
4. When only a single output is required, delete C11 through C14, C17, D8, J6, J7, L2, R10 and Z4. Modify T1
design to delete the unwanted second output winding and increase the copper used for the single output
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