Datasheet

3
VIN
4
RCLASS
EN
+
-
7
+
-
Threshold
VEE
to UVLO
PoE Line
Input
PoE Line
Return
VIN = 23.5V
LM5072
R
CLASS
1.25V
1.25V
front_aux
rear_aux
thermal_limit
LM5072
www.ti.com SNVS437D –MARCH 2006–REVISED APRIL 2013
Table 2. Classification Levels and Required External Resistor Value
Class PD Max Power Level ICLASS Range LM5072
RCLASS Value
From To From To
0 (Default) 0.44W 12.95W 0 mA 4 mA Open
1 0.44W 3.84W 9 mA 12 mA 130Ω
2 3.84W 6.49W 17 mA 20 mA 71.5Ω
3 6.49W 12.95W 26 mA 30 mA 46.4Ω
4 Reserved Reserved 36 mA 44 mA 31.6Ω
Figure 18. PD Classification – Fulfilled With a Single External Resistor
Figure 18 shows the LM5072’s implementation of PD classification using an external resistor connected to the
RCLASS pin. During classification, the voltage across the VIN and VEE pins is between 13V and 23.5V. In this
voltage range, the class resistor RCLASS is engaged by enabling the 1.25V buffer amplifier and MOSFET. After
classification is complete, the voltage from the PSE will increase to the normal operating voltage of the PoE
system (48V nominal). When V
IN
rises above 23.5V, the LM5072 will disengage the RCLASS resistor to reduce
on-chip power dissipation.
The classification feature is disabled when either the front or rear auxiliary power options are selected, as the
classification function is not required when power is supplied from an auxiliary source. The classification function
is also disabled when the LM5072 reaches the thermal shutdown temperature threshold (nominally 165°C). This
may occur if the LM5072 is operated at elevated ambient temperatures and the classification time exceeds the
IEEE802.3af limit of 75 ms.
When the classification option is not required, simply leave the RCLASS pin open to set the PD to the default
Class 0 state. Class 0 requires that the PSE allocate the maximum IEEE802.3af specified power of 15.4 W
(12.95 W at the PD input terminals) to the PD.
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