Datasheet

LM5066
www.ti.com SNVS655G –JUNE 2011–REVISED FEBRUARY 2013
Electrical Characteristics
Limits in standard type are for T
J
= 25°C only; limits in boldface type apply over the junction temperature (T
J
) range of -40°C
to +125°C unless otherwise stated. Minimum and Maximum limits are ensured through test, design, or statistical correlation.
Typical values represent the most likely parametric norm at T
J
= 25°C, and are provided for reference purposes only. Unless
otherwise stated the following conditions apply: VIN = 48V. See
(1)
and
(2)
.
Symbol Parameter Conditions Min Typ Max Units
Input (VIN Pin)
I
IN-EN
Input Current, enabled V
UVLO
= 3V and V
OVLO
= 2V 7.2 9.5 mA
POR
IT
Power On Reset threshold at VIN to VIN Increasing 7.8 9.0 V
trigger insertion timer
POR
EN
Power On Reset threshold at VIN to VIN Increasing 8.6 9.9 V
enable all functions
POR
HYS
POR
EN
Hysteresis VIN Decreasing 120 mV
V
DD
Regulator (VDD pin)
V
DD
I
VDD
= 0 mA 4.60 4.90 5.15 V
I
VDD
= 10 mA 4.85 V
V
DDILIM
VDD Current Limit -25 -30 -42 mA
V
DDPOR
VDD Voltage Reset threshold V
DD
Rising 4.1 V
UVLO/EN, OVLO Pins
UVLO
TH
UVLO threshold V
UVLO
Falling 2.41 2.48 2.55 V
UVLO
HYS
UVLO hysteresis current UVLO = 1V 13 20 26 µA
UVLO
DEL
UVLO delay Delay to GATE high 9 µs
Delay to GATE low 13
UVLO
BIAS
UVLO bias current UVLO = 3V 1 µA
OVLO
TH
OVLO threshold V
OVLO
Rising 2.39 2.46 2.53 V
OVLO
HYS
OVLO hysteresis current OVLO = 1V -26 -21 -13 µA
OVLO
DEL
OVLO delay Delay to GATE high 13 µs
Delay to GATE low 10
OVLO
BIAS
OVLO bias current OVLO = 1V 1 µA
Power Good (PGD pin)
PGD
VOL
Output low voltage I
SINK
= 2 mA 60 110 mV
PGD
IOH
Off leakage current V
PGD
= 80V 1 µA
FB Pin
FB
TH
FB Threshold V
UVLO
= 3V and V
OVLO
= 2V 2.41 2.46 2.52 V
FB
HYS
FB Hysteresis Current -25 -20 -15 µA
FB
DEL
FB Delay Delay to PGD high 7.6 µs
Delay to PGD low 9.2 µs
FB
LEAK
Off Leakage Current V
FB
= 2.3V 1 µA
Power Limit (PWR Pin)
PWR
LIM
Power limit sense voltage (VIN-SENSE) SENSE-OUT = 48V, R
PWR
= 121 kΩ 16.5 19.5 22.5 mV
SENSE-OUT = 24V, R
PWR
= 75 kΩ 23 mV
I
PWR
PWR pin current V
PWR
= 2.5V -20 µA
R
SAT(PWR)
PWR pin impedance when disabled UVLO = 2V 135 Ω
Gate Control (GATE Pin)
I
GATE
Source current Normal Operation -26 -20 -10 µA
Fault Sink current UVLO = 2V 3.4 4.2 5.3 mA
POR Circuit Breaker sink current VIN - SENSE = 150 mV or VIN < POR
IT
, 50 115 180 mA
V
GATE
= 5V
(1) Current out of a pin is indicated as a negative value.
(2) All electrical characteristics having room temperature limits are tested during production at T
A
= 25°C. All hot and cold limits are
specified by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
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