Datasheet
LM5060
GATE
OUT
V
IN
TIMER
GND
SENSE
VIN
OVP
UVLO
EN
D1
D2
C1
R1
Q3
Q1 Q2
D5
GND
GND
V
OUT
nPGD
D4
R8
D3
36V
R5
49.9 k:
R6
5.62 k:
R7
5.11 k:
C2
100 nF
68 nF
R2
10 k:
10 k:
2 k:
R4
10 k:
R3
12 k:
75A, 40V 75A, 40V
0.6A, 40V
Enable
Status
SSD D
I
DSTH
=
V
DSTH
R
DS(ON)
V
DSTH
= I
SENSE
x
R
O
I
RATIO
R
S
-
+ V
OFFSET
R
S
=
V
DSTH
I
SENSE
+
R
O
x I
OUT-EN
I
SENSE
V
OFFSET
I
SENSE
-
R
O(MIN)
=
V
OUT
25 mA
LM5060
SNVS628F –OCTOBER 2009–REVISED APRIL 2013
www.ti.com
Case D for situations where V
OUT
< V
IN
, while V
OUT
is negative and V
IN
is positive. See Figure 37. R
O
needs to
be selected to protect the OUT pin from currents exceeding 25 mA.
(19)
FAULT DETECTION WITH R
S
AND R
O
Figure 38 shows an example circuit where the OUT pin is protected against a reverse battery situation with a
current limiting resistor R
O
. When using resistor R
O
in the OUT pin path, the resistor R
S
has to be selected taking
the R
O
resistor into account. The LM5060 monitors the V
DS
voltage of an external N-Channel MOSFET. The V
DS
fault detection voltage is the drain to source voltage threshold (V
DSTH
). The formula below calculates a proper R
S
resistor value for a desired V
DSTH
taking into account the voltage drop across the R
O
resistor.
(20)
V
OFFSET
is the offset voltage between the SENSE pin and the OUT pin, I
SENSE
is the threshold programming
current, and I
OUT-EN
is the OUT pin bias current. When R
S
and R
O
have been selected, the following formula can
be used for V
DSTH
min and max calculations:
(21)
The MOSFET drain-to-source current threshold is:
where
• R
DS(ON)
is the on resistance of the pass element Q1 in Figure 21 (22)
CIRCUIT EXAMPLE OF REVERSE POLARITY PROTECTION WITH RESISTOR
Figure 38 shows an example circuit which is protected against reverse polarity using resistor R8 instead of the
diodes D5 and D7 of Figure 34.
Figure 38 Example Circuit Specification
Operating Voltage Range 9V to 24V
Current max 30A
OVP setting 27V typical
UVLO setting 9V typical
Figure 38. Application with Reverse Polarity Protection with a Resistor for OUT Pin Protection
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