Datasheet

EN
V
GS
Status
nPGD
V
TIMER
6 PA
11 PA
V
GS
V
GATE-TH
transition region
V
GS
> 5V
V
GS
< 5V
OFF
ON
V
TMRH
V
TMRL
OK
Fault
LM5060
SNVS628F –OCTOBER 2009–REVISED APRIL 2013 www.ti.com
Figure 22. Voltages During Normal Start Up Sequence
Table 1. Overview of Operating Conditions
Input Conditions Outputs Status
VIN
OVP VIN GATE- GATE Current GATE after nPG
EN UVLO SENSE-OUT Current TIMER
(typ) (typ) OUT (typ) TIMER > 2V D
(typ)
L L - >5.10V NA NA 0.009 mA 2.2 mA sink Low NA NA Disabled
L H - >5.10V NA NA 0.009 mA 2.2 mA sink Low NA NA Disabled
SENSE>OUT H
H L <2V >5.10V NA 0.56 mA 2.2 mA sink Low NA Standby
SENSE<OUT L
SENSE>OUT H
H L >2V >5.10V NA 0.56 mA 80 mA sink Low NA Standby
SENSE<OUT L
SENSE>OUT 6 µA source 80 mA sink H
H H <2V >5.10V <5V 1.4 mA 24 µA source Enabled
SENSE<OUT Low NA L
11 µA
SENSE>OUT 80 mA sink H
source
H H <2V >5.10V >5V 1.4 mA 24 µA source Enabled
SENSE<OUT Low NA L
SENSE>OUT H
Over
H H >2V >5.10V NA 1.4 mA 80 mA sink Low NA
Voltage
SENSE<OUT L
2.2 mA sink Power on
H H <2V <5.10V NA NA 1.4 mA Low NA H
(See
(1)
) reset
(1) The 2.2 mA sink current is valid for with the VIN pin ≥ 5.1V. When the VIN pin < 5.1V the sink current is lower. See ‘GATE Pin Off
Current vs. VIN’ plot in Typical Performance Characteristics.
GATE CONTROL
A charge pump provides bias voltage above the input and output voltage to enhance the N-Channel MOSFET’s
gate. When the system voltage is initially applied and both EN and UVLO are above their respective thresholds,
the GATE pin is charged by the 24 µA (typical) current source. During normal operating conditions, the GATE pin
voltage is clamped to approximately 16.8V above the OUT pin (i.e. V
GS
) by an internal zener.
When either the UVLO input or the EN input is low, or when VIN is below the Power-On Reset voltage of 5.10V
(typical), the GATE pin is discharged with a 2.2 mA (typical) current sink.
When the timer capacitor is charged up to the V
TMRH
threshold (typically 2V) a fault condition is indicated and the
gate of the external N-Channel MOSFET is discharged at a 80 mA (typical) rate . Additionally, when the OVP pin
voltage is higher than the OVP
TH
threshold (typically 2V) a fault is indicated and the gate of the external N-
Channel MOSFET is discharged at the same 80 mA (typical) rate.
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