Datasheet

OFF
GATE
OUT
IN
1
2
3
6
5
4
VS
GND
LM5050MK-1
Inductive Kick-Back Protection www.ti.com
Figure 1. Forward Waveforms Figure 2. Reverse Waveforms
4 Inductive Kick-Back Protection
Diode D1 and capacitor C1 (as do diode D2 and capacitor C2) serve as inductive kick-back protection to
limit negative transient voltage spikes generated on the input when the input supply voltage is abruptly
taken to zero volts.
5 Off Test Point
The Off test point provided on the LM5050-1 evaluation board is used to control the LM5050-1 operation.
The Off test point is connected directly to the LM5050-1 OFF pin. See the LM5050-1High Side OR-ing
FET Controller (SNVS629) data sheet for more details.
To enable the LM5050-1 apply a voltage less than 0.8V to the Off test point, connect the Off test point to
GND, or leave the Off test point open (default). If the Off test point is left open, the LM5050-1 OFF pin
internal pull-down will ensure that the LM5050-1 becomes operational.
To disable the LM5050-1 apply a voltage greater than 2.0V to the Off test point.
Figure 3. OFF pin vs GATE Figure 4. Connection Diagram
2
AN-2087 LM5050-1EVAL Evaluation Board SNVA458A–April 2011–Revised May 2013
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