Datasheet

LM5046
SNVS703G FEBRUARY 2011REVISED MARCH 2013
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PRINTED CIRCUIT BOARD LAYOUT
The LM5046 current sense and PWM comparators are very fast and respond to short duration noise pulses. The
components at the CS, COMP, SLOPE, RAMP, SS, SSSR, RES, UVLO, OVP, RD1, RD2, and RT pins should
be physically close as possible to the IC, thereby minimizing noise pickup on the PC board trace inductance.
Eliminating or minimizing via’s in these critical connections are essential. Layout consideration is critical for the
current sense filter. If a current sense transformer is used, both leads of the transformer secondary should be
routed to the sense filter components and to the IC pins. The ground side of the transformer should be
connected via a dedicated PC board trace to the AGND pin, rather than through the ground plane. If the current
sense circuit employs a sense resistor in the drive transistor source, low inductance resistors should be used. In
this case, all the noise sensitive, low-current ground trace should be connected in common near the IC, and then
a single connection made to the power ground (sense resistor ground point).
The gate drive outputs of the LM5046 should have short, direct paths to the power MOSFETs in order to
minimize inductance in the PC board. The boot-strap capacitors required for the high side gate drivers should be
located very close to the IC and connected directly to the BST and HS pins. The VCC and REF capacitors
should also be placed close to their respective pins with short trace inductance. Low ESR and ESL ceramic
capacitors are recommended for the boot-strap, VCC and the REF capacitors. The two ground pins (AGND,
PGND) must be connected together directly underneath the IC with a short, direct connection, to avoid jitter due
to relative ground bounce.
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