Datasheet

R
T
=
1
F
OSC
x 1 x 10
-10
LM5046
SNVS703G –FEBRUARY 2011–REVISED MARCH 2013 www.ti.com
Over Voltage Protection
An external voltage divider can be used to set either an over voltage or an over temperature protection. During
an OVP condition, the SS and SSSR capacitors are discharged and all the outputs are disabled. The divider
must be designed such that the voltage at the OVP pin is greater than 1.25V when over voltage/temperature
condition exists. Hysteresis is accomplished with an internal 20μA current source. When the OVP pin voltage
exceeds 1.25V, the 20μA current source is activated to quickly raise the voltage at the OVP pin. When the OVP
pin voltage falls below the 1.25V threshold, the current source is deactivated causing the voltage at the OVP to
quickly fall. Refer to the APPLICATION INFORMATION section for more details.
Reference
The REF pin is the output of a 5V linear regulator that can be used to bias an opto-coupler transistor and
external housekeeping circuits. The regulator output is internally current limited to 15mA. The REF pin needs to
be locally decoupled with a ceramic capacitor, the recommended range of values are from 0.1μF to 10μF
Oscillator, Sync Input
The LM5046 oscillator frequency is set by a resistor connected between the RT pin and AGND. The RT resistor
should be located very close to the device. To set a desired oscillator frequency (F
OSC
), the necessary value of
RT resistor can be calculated from the following equation:
(1)
For example, if the desired oscillator frequency is 400 kHz i.e. each phase (LO1 or LO2) at 200 kHz, the value of
R
T
will be 25kΩ. If the LM5046 is to be synchronized to an external clock, that signal must be coupled into the
RT pin through a 100pF capacitor. The RT pin voltage is nominally regulated at 2.0V and the external pulse
amplitude should lift the pin to between 3.5V and 5.0V on the low-to-high transition. The synchronization pulse
width should be between 15 and 200ns. The RT resistor is always required, whether the oscillator is free running
or externally synchronized and the SYNC frequency must be equal to, or greater than the frequency set by the
RT resistor. When syncing to an external clock, it is recommended to add slope compensation by connecting an
appropriate resistor from the VCC pin to the CS pin. Also disable the SLOPE pin by grounding it.
Cycle-by-Cycle Current Limit
The CS pin is to be driven by a signal representative of the transformer’s primary current. If the voltage on the
CS pin exceeds 0.75V, the current sense comparator immediately terminates the PWM cycle. A small RC filter
connected to the CS pin and located near the controller is recommended to suppress noise. An internal 18Ω
MOSFET discharges the external current sense filter capacitor at the conclusion of every cycle. The discharge
MOSFET remains on for an additional 40ns after the start of a new PWM cycle to blank leading edge spikes. The
current sense comparator is very fast and may respond to short duration noise pulses. Layout is critical for the
current sense filter and the sense resistor. The capacitor associated with CS filter must be placed very close to
the device and connected directly to the CS and AGND pins. If a current sense transformer is used, both the
leads of the transformer secondary should be routed to the filter network, which should be located close to the
IC. When designing with a current sense resistor, all of the noise sensitive low power ground connections should
be connected together near the AGND pin, and a single connection should be made to the power ground (sense
resistor ground point).
Hiccup Mode
The LM5046 provides a current limit restart timer to disable the controller outputs and force a delayed restart (i.e.
Hiccup mode) if a current limit condition is repeatedly sensed. The number of cycle-by-cycle current limit events
required to trigger the restart is programmed by the external capacitor at the RES pin. During each PWM cycle,
the LM5046 either sources or sinks current from the RES capacitor. If current limit is detected, the 5μA current
sink is disabled and a 30μA current source is enabled. If the RES voltage reaches the 1.0V threshold, the
following restart sequence occurs, as shown in Figure 13:
• The SS and SSSR capacitors are fully discharged
• The 30μA current source is turned-off and the 10μA current source is turned-on.
• Once the voltage at the RES pin reaches 4.0V the 10μA current source is turned-off and a 5μA current sink is
turned-on, ramping the voltage on the RES capacitor down to 2.0V.
• Once RES capacitor reaches 2.0V, threshold, the 10μA current source is turned-on again. The RES capacitor
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