Datasheet

LO1
PGND
VCC
BST1
HO1
HS1
VIN
LM5045
Q1
D1
Hiccup Mode off-time
Soft-Start
Restart delay
1V
2V
4V
Count to Eight
1V
LM5045
SNVS699G FEBRUARY 2011REVISED MARCH 2013
www.ti.com
Figure 30. Hiccup Mode Delay and Soft-Start Timing Diagram
Augmenting the Gate Drive Strength
The LM5045 includes powerful 2A integrated gate drivers. However, in certain high power applications (>500W),
it might be necessary to augment the strength of the internal gate driver to achieve higher efficiency and better
thermal performance. In high power applications, typically, the I
2
xR loss in the primary MOSFETs is significantly
higher than the switching loss. In order to minimize the I
2
xR loss, either the primary MOSFETs are paralleled or
MOSFETs with low R
DS (on)
are employed. Both these scenarios increase the total gate charge to be driven by
the controller IC. An increase in the gate charge increases the FET transition time and hence increases the
switching losses. Therefore, to keep the total losses within a manageable limit the transition time needs to be
reduced.
Generally, during the miller capacitance charge/discharge the total available driver current is lower during the
turn-off process than during the turn-on process and often it is enough to speed-up the turn-off time to achieve
the efficiency and thermal goals. This can be achieved simply by employing a PNP device, as shown in
Figure 31, from gate to source of the power FET. During the turn-on process, when the LO1 goes high, the
current is sourced through the diode D1 and the BJT Q1 provides the path for the turn-off current. Q1 should be
located as close to the power FET as possible so that the turn-off current has the shortest possible path to the
ground and does not have to pass through the controller.
Figure 31. Circuit to Speed-up the Turn-off Process
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