Datasheet
HO1, LO2
SR2
HO2, LO1
SR1
T1
T2
T1
T2
LM5045
SNVS699G –FEBRUARY 2011–REVISED MARCH 2013
www.ti.com
Figure 15. Synchronous Rectifier Timing Diagram
Soft-Start of the Synchronous Rectifiers
In addition to the basic soft-start already described, the LM5045 contains a second soft-start function that
gradually turns on the synchronous rectifiers to their steady-state duty cycle. This function keeps the
synchronous rectifiers off during the basic soft-start allowing a linear start-up of the output voltage even into pre-
biased loads. Then the SR output duty cycle is gradually increased to prevent output voltage disturbances due to
the difference in the voltage drop between the body diode and the channel resistance of the synchronous
MOSFETs. Initially, when bias is supplied to the LM5045, the SSSR capacitor is discharged by an internal
MOSFET. When the SS capacitor reaches a 2V threshold and once it is established that COMP is in control of
the duty cycle i.e. I
COMP
< 800µA, the SSSR discharge is released and SSSR capacitor begins charging with a
20µA current source. Once the SSSR cap crosses the internal 1V threshold, the LM5045 begins the soft-start of
the synchronous FETs. The SR soft-start follows a leading edge modulation technique i.e. the leading edge of
the SR pulse is soft-started as opposed trailing edge modulation of the primary FETs. As shown in the
Figure 16(a), SR1 and SR2 are turned-on simultaneously with a narrow pulse-width during the freewheeling
cycle. At the end of the freewheel cycle i.e. at the rising edge of the internal CLK, the SR FET in-phase with the
next power transfer cycle is kept on while the SR FET out of phase with it is turned-off. The in-phase SR FET is
kept on throughout the power transfer cycle and at the end of it, both the primary FETs and the in-phase SR
FETs are turned-off together. The synchronous rectifier outputs can be disabled by grounding the SSSR pin.
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