Datasheet

LM5041
www.ti.com SNVS248D –AUGUST 2003–REVISED MARCH 2013
PIN DESCRIPTION
PIN NAME DESCRIPTION APPLICATION INFORMATION
1 V
IN
Source Input Voltage Input to start-up regulator. Input range 15V to 100V.
2 FB Feedback Signal Inverting input for the internal error amplifier. The non-
inverting input is connected to a 0.75V reference.
3 COMP Output of the Internal Error Amplifier There is an internal 5kΩ resistor pull-up on this pin. The
error amplifier provides an active sink.
4 REF Precision 5 volt reference output Maximum output current: 10mA. Locally decouple with a
0.1µF capacitor. Reference stays low until the line UV and
the V
CC
UV are satisfied.
5 HD Main Buck PWM control output Buck switch PWM control output. The maximum duty cycle
clamp for this output corresponds to an off time of typically
240ns per cycle. The LM5101 or LM5102 Buck stage gate
driver can be used to level shift and drive the Buck switch.
6 LD Sync Switch control output Sync Switch control output. Inversion of HD output. The
LM5101 or LM5102 lower drive can be used to drive the
synchronous rectifier switch.
7 V
CC
Output from the internal high voltage start-up If an auxiliary winding raises the voltage on this pin above
regulator. Regulated to 9 volts. the regulation setpoint, the internal start-up regulator will
shutdown, reducing the IC power dissipation.
8 PUSH Output of the push-pull drivers Output of the push-pull gate driver. Output capability of
1.5A peak .
9 PULL Output of the push-pull drivers Output of the push-pull gate driver. Output capability of
1.5A peak.
10 PGND Power ground Connect directly to analog ground.
11 AGND Analog ground Connect directly to power ground.
12 CS Current sense input Current sense input to the PWM comparator (CM control).
There is a 50ns leading edge blanking on this pin. Using
separate dedicated comparators, if CS exceeds 0.5V the
outputs will go into cycle by cycle current limit. If CS
exceeds 0.6V the outputs will be disabled and a soft-start
commenced.
13 SS Soft-start control An external capacitor and an internal 10uA current source,
set the soft-start ramp. The controller will enter a low
power state if the SS pin is below the shutdown threshold
of 0.45V
14 TIME Push-Pull overlap and dead time control An external resistor (R
SET
) sets the overlap time or dead
time for the push-pull outputs. A resistor connected
between TIME and GND produces overlap. A resistor
connected between TIME and REF produces dead time.
15 RT / SYNC Oscillator timing resistor pin and sync An external resistor sets the oscillator frequency. This pin
will also accept an external oscillator.
16 UVLO Line Under-Voltage Shutdown An external divider from the power converter source sets
the shutdown levels. Threshold of operation equals 2.5V.
Hysteresis is set by a switched internal current source
(20µA).
WSON SUB Die substrate The exposed die attach pad on the WSON package should
DAP be connected to a PCB thermal pad at ground potential.
For additional information on using Texas Instruments' No
Pull Back WSON package, please refer to LLP Application
Note AN-1187 SNOA401.
Copyright © 2003–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: LM5041