Datasheet

R
FF
x C
FF
=
T
ON
+ 10%
In
1-
2.5V
VIN
¨
©
§
¨
©
§
-1
2.5 Ps + 0.25 Ps
In
1-
2.5V
48V
¨
©
§
¨
©
§
-1
=
= 51.4 Ps
LM5035
SNVS428G –JANUARY 2006–REVISED MARCH 2013 www.ti.com
PWM Comparator
The pulse width modulation (PWM) comparator compares the voltage ramp signal at the RAMP pin to the loop
error signal. This comparator is optimized for speed in order to achieve minimum controllable duty cycles. The
loop error signal is received from the external feedback and isolation circuit is in the form of a control current into
the COMP pin. The COMP pin current is internally mirrored by a matched pair of NPN transistors which sink
current through a 5kΩ resistor connected to the 5V reference. The resulting control voltage passes through a 1V
level shift before being applied to the PWM comparator.
An opto-coupler detector can be connected between the REF pin and the COMP pin. Because the COMP pin is
controlled by a current input, the potential difference across the optocoupler detector is nearly constant. The
bandwidth limiting phase delay which is normally introduced by the significant capacitance of the opto-coupler is
thereby greatly reduced. Higher loop bandwidths can be realized since the bandwidth-limiting pole associated
with the opto-coupler is now at a much higher frequency. The PWM comparator polarity is configured such that
with no current into the COMP pin, the controller produces the maximum duty cycle at the main gate driver
outputs, HO and LO.
Feed-Forward Ramp and Volt • Second Clamp
An external resistor (R
FF
) and capacitor (C
FF
) connected to VIN, AGND, and the RAMP pin are required to create
the PWM ramp signal. The slope of the signal at RAMP will vary in proportion to the input line voltage. This
varying slope provides line feed-forward information necessary to improve line transient response with voltage
mode control. The RAMP signal is compared to the error signal by the pulse width modulator comparator to
control the duty cycle of the HO and LO outputs. With a constant error signal, the on-time (T
ON
) varies inversely
with the input voltage (VIN) to stabilize the Volt • Second product of the transformer primary signal. The power
path gain of conventional voltage-mode pulse width modulators (oscillator generated ramp) varies directly with
input voltage. The use of a line generated ramp (input voltage feed-forward) nearly eliminates this gain variation.
As a result, the feedback loop is only required to make very small corrections for large changes in input voltage.
In addition to the PWM comparator, a Volt • Second Clamp comparator also monitors the RAMP pin. If the ramp
amplitude exceeds the 2.5V threshold of the Volt • Second Clamp comparator, the on-time is terminated. The C
FF
ramp capacitor is discharged by an internal 32Ω discharge MOSFET controlled by the V•S Clamp comparator. If
the RAMP signal does not exceed 2.5V before the end of the clock period, then the internal clock will enable the
discharge MOSFET to reset capacitor C
FF
.
By proper selection of R
FF
and C
FF
values, the maximum on-time of HO and LO can be set to the desired
duration. The on-time set by the Volt • Second Clamp varies inversely to the line voltage because the RAMP
capacitor is charged by a resistor (R
FF
) connected to VIN while the threshold of the clamp is a fixed voltage
(2.5V). An example will illustrate the use of the Volt • Second Clamp comparator to achieve a 50% duty cycle
limit at 200kHz with a 48V line input. A 50% duty cycle at a 200kHz requires a 2.5µs on-time. To achieve this
maximum on-time clamp level:
(1)
The recommended capacitor value range for C
FF
is 100pF to 1000pF. 470pF is a standard value that can be
paired with an 110kΩ to approximate the desired 51.4µs time constant. If load transient response is slowed by
the 10% margin, the R
FF
value can be increased. The system signal-to-noise will be slightly decreased by
increasing R
FF
x C
FF
.
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