Datasheet

LM5035
SNVS428G –JANUARY 2006–REVISED MARCH 2013 www.ti.com
Functional Description
The LM5035 PWM controller contains all of the features necessary to implement half-bridge voltage-mode
controlled power converters. The LM5035 provides two gate driver outputs to directly drive the primary side
power MOSFETs and two signal level outputs to control secondary synchronous rectifiers through an isolation
interface. Secondary side drivers, such as the LM5110, are typically used to provide the necessary gate drive
current to control the sync MOSFETs. Synchronous rectification allows higher conversion efficiency and greater
power density than conventional PN or Schottky rectifier techniques. The LM5035 can be configured to operate
with bias voltages ranging from 8V to 105V. Additional features include line under-voltage lockout, cycle-by-cycle
current limit, voltage feed-forward compensation, hiccup mode fault protection with adjustable delays, soft-start, a
2MHz capable oscillator with synchronization capability, precision reference, thermal shutdown and
programmable volt•second clamping. These features simplify the design of voltage-mode half-bridge DC-DC
power converters. The Functional Block Diagram is shown in Figure 11.
High-Voltage Start-up Regulator
The LM5035 contains an internal high voltage start-up regulator that allows the input pin (VIN) to be connected
directly to a nominal 48 VDC input voltage. The regulator input can withstand transients up to 105V. The
regulator output at VCC (7.6V) is internally current limited to 25 mA typical. When the UVLO pin potential is
greater than 0.4V, the VCC regulator is enabled to charge an external capacitor connected to the VCC pin. The
VCC regulator provides power to the voltage reference (REF) and the output drivers (LO, SR1 and SR2). When
the voltage on the VCC pin exceeds the UVLO threshold of 7.6V, the internal voltage reference (REF) reaches
its regulation setpoint of 5V and the UVLO voltage is greater than 1.25V, the controller outputs are enabled. The
value of the VCC capacitor depends on the total system design, and its start-up characteristics. The
recommended range of values for the VCC capacitor is 0.1µF to 100µF.
The VCC under-voltage comparator threshold is lowered to 6.2V (typical) after VCC reaches the regulation set-
point. If VCC falls below this value, the outputs are disabled, and the soft-start capacitor is discharged. If VCC
increases above 7.6V, the outputs will be enabled and a soft-start sequence will commence.
The internal power dissipation of the LM5035 can be reduced by powering VCC from an external supply. In
typical applications, an auxiliary transformer winding is connected through a diode to the VCC pin. This winding
must raise the VCC voltage above 8.3V to shut off the internal start-up regulator. Powering VCC from an
auxiliary winding improves efficiency while reducing the controller’s power dissipation. The under-voltage
comparator circuit will still function in this mode, requiring that VCC never falls below 6.2V during the start-up
sequence.
During a fault mode, when the converter auxiliary winding is inactive, external current draw on the VCC line
should be limited such that the power dissipated in the start-up regulator does not exceed the maximum power
dissipation of the IC package.
An external DC bias voltage can be used instead of the internal regulator by connecting the external bias voltage
to both the VCC and the VIN pins. The external bias must be greater than 8.3V to exceed the VCC UVLO
threshold and less than the VCC maximum operating voltage rating (15V).
Line Under-Voltage Detector
The LM5035 contains a dual level Under-Voltage Lockout (UVLO) circuit. When the UVLO pin voltage is below
0.4V, the controller is in a low current shutdown mode. When the UVLO pin voltage is greater than 0.4V but less
than 1.25V, the controller is in standby mode. In standby mode the VCC and REF bias regulators are active
while the controller outputs are disabled. When the VCC and REF outputs exceed the VCC and REF under-
voltage thresholds and the UVLO pin voltage is greater than 1.25V, the outputs are enabled and normal
operation begins. An external set-point voltage divider from VIN to GND can be used to set the minimum
operating voltage of the converter. The divider must be designed such that the voltage at the UVLO pin will be
greater than 1.25V when VIN enters the desired operating range. UVLO hysteresis is accomplished with an
internal 23uA current sink that is switched on or off into the impedance of the set-point divider. When the UVLO
threshold is exceeded, the current sink is deactivated to quickly raise the voltage at the UVLO pin. When the
UVLO pin voltage falls below the 1.25V threshold, the current sink is enabled causing the voltage at the UVLO
pin to quickly fall. The hysteresis of the 0.4V shutdown comparator is internally fixed at 100mV.
The UVLO pin can also be used to implement various remote enable / disable functions. Turning off a converter
by forcing the UVLO pin to the standby condition provides a controlled soft-stop. See Soft-Start for more details.
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