Datasheet

R33/C34/C35
2.5V
Ref.
From U5
From U6
COMP2
COMP1
LM5034
L2
U3
R31
R34
R43
D E
L3
U4
B C
R48
R47
U2
U1
F G
J6
J5
J8
J7
T3
T4
3.3V
OUT
V
PWR
|
|
R33/C34/C35
2.5V
Ref.
From U5
From U6
COMP2
COMP1
LM5034
L2
U3
R31
R34
R43
D E
L3
U4
B A
R48
R47
U2
U1
F G
J6
J5
J8
J7
T3
T4
3.3V
V
PWR
|
|
2.5V
Ref.
2.5V
R46/C37/C38
LM5034
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SNVS347A FEBRUARY 2005REVISED APRIL 2013
APPLICATION CIRCUIT EXAMPLE
Figure 40 shows an example of an LM5034 controlled 200W dual interleaved regulator which provides two
independent regulated outputs or a single high current output. The input voltage range (V
PWR
) is 36V to 78V, and
the output voltages are 3.3V and 2.5V in the dual output mode, or 3.3V in the single output mode. The output
current capability is 30A from each output or 60A in the single output mode. Current sense transformers T1 and
T2 provide information to the CS2 and CS1 pins for the current mode control, and error amplifiers U3 and U4
provide voltage feedback to COMP2 and COMP1 via optocoupler U2. Synchronous rectifiers Q5-Q12 minimize
rectification losses in the secondaries. An auxiliary winding on inductor L2 provides power to the LM5034 VCC
pins when the outputs are enabled. The UVLO levels are 34.3V for increasing V
PWR
, and 32.3V for decreasing
V
PWR
. The circuit can be shut down by forcing the ON/OFF input (J2) below 1.25V. An external synchronizing
frequency can be applied to the SYNC input (J3). Each regulator output is current limited at 31.5A.
To configure the circuit for two independent outputs, jumper A-B is installed, and the other jumpers connections
(C through G) are left open. U5 and U6 are the references for the two error amplifiers which control the
LM5034’s COMP pins via the optocouplers. See Figure 36.
To configure the circuit for a single high current output, jumpers B-C, D-E, and F-G are installed and A-B is
removed. Output terminals J8 and J6 are connected together at the load, as well as the ground terminals J5 and
J7. In this mode U4 is a follower to error amplifier U3, and the optocoupler outputs are connected together to
provide the same voltage to COMP1 and COMP2. See Figure 37. Efficiency measurements for this circuit are
shown in Figure 38 and Figure 39.
Figure 36. Circuit Configuration for Independent Outputs
Figure 37. Circuit Configuration for Single High Current Output
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