Datasheet

C
SS1
PWM
Controller #1
Softstart
#1
COMP1
SS1
Shutdown
Control
PWM
Controller #2
COMP2
To Output
Drivers
Softstart
# 2
C
SS2
SS2
LM5034
Coupler
Opto-
Coupler
Opto-
t2 =
C
SS
x 1.5V
1 PA
= 1.5 x 10
6
x C
SS
t1 =
C
SS
x 1.5V
50 PA
= 3 x 10
4
x C
SS
LM5034
www.ti.com SNVS347A –FEBRUARY 2005–REVISED APRIL 2013
If the application requires no delay from the first detection of a current limit condition, so that t1 is effectively
zero, the RES pin can be left open (no external capacitor). If it is desired to disable the hiccup mode current limit
operation then the RES pin should be connected to ground.
SOFT-START
The capacitors at SS1 and SS2 determine the time required for each regulator’s output duty cycle to increase
from zero to its final value for regulation. The minimum acceptable time is dependent on the output capacitance
and the response of each feedback loop to the COMP pin. If the Soft-start time is too quick, the output could
significantly overshoot its intended voltage before the feedback loop has a chance to regulate the PWM
controller.
After power is applied and V
CC
has passed its upper UVT threshold (≊7.6V), the voltage at each SS pin ramps up
as its external capacitor is charged up by an internal 50 µA current source (see Figure 5). The voltage at the
COMP pins follow the SS pins. When both have reached ≊1.5V, PWM pulses appear at the driver outputs with
very low duty cycle. The voltage at each SS pin continues to increase to ≊5.0V. The voltage at each COMP pin,
and the PWM duty cycle, increase to the value required for regulation as determined by its feedback loop. The
time t1 in Figure 5 is calculated from:
(11)
With a 0.1 µF capacitor at SS, t1 is ≊3 ms.
If the Hiccup Mode Current Limit Restart circuit activates due to repeated current limit detections at CS1 and/or
CS2, both SS1 and SS2 are internally grounded (see HICCUP MODE CURRENT LIMIT RESTART). After a
short propagation delay, the SS pins are released and the external SS pin capacitors are charged by internal 1
µA current sources. The slow charge rate provides a rest or dwell time for the converter power stage (t2 in
Figure 23), reducing the average input current and component temperature rise while in an overload condition.
When the voltage at the SS and COMP pins reach ≊1.5V, the first pulse out of either PWM comparator switches
the internal SS pin current sources to 50 µA. The voltages at the SS and COMP pins then increase more quickly,
increasing the duty cycle at the output drivers. The rest time t2 is the time required for SS to reach 1.5V:
(12)
With a 0.1 µF capacitor at SS, t2 is ≊150 ms.
Experimentation with the startup sequence and over-current restart condition is usually necessary to determine
the appropriate value for the SS capacitors.
To shutdown one regulator without affecting the other, ground the appropriate SS pin with an open collector or
open drain device as shown in Figure 34. The SS pin forces the COMP pin to ground which reduces the PWM
duty cycle to zero for that regulator. Releasing the SS pin allows normal operation to resume.
When the LM5034’s two controller channels are configured to provide a single high current output, SS1 and SS2
are typically connected together, requiring a single capacitor for the two pins.
Figure 34. Shutting Down One Regulator Channel
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