Datasheet

LM5033

Out1

Out2

LM5100

LM5033

Out1

Out2

LM5100

Reduce Deadtime

Increase Deadtime

LM5033

SNVS181B –APRIL 2004–REVISED APRIL 2013

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If the LM5033 is to be synchronized to an external clock, that signal must be coupled into pin 9 through a 100 pF

capacitor. The R

resistor is still required in this case, and it must be selected to set the internal oscillator to a

frequency lower than the external synchronizing frequency. The amplitude of the external pulses must take pin 9

above 3.8V on the low-to-high transition but no higher than 5.5V. The clock pulse width should be between 15

and 150 ns.

DEADTIME ADJUSTMENT

If the application requires a change in the minimum deadtime between the outputs, the circuits in Figure 14 are

recommended. Suggested values for the resistor and capacitor at each output are 500Ω, and 100 pF,

respectively for a nominal 50 ns change. The diodes can be 1N4148, or similar.

Figure 14. Deadtime Adjustment

PC BOARD LAYOUT

The LM5033 current sense and PWM comparators are very fast, and as such will respond to short duration noise

pulses. Layout considerations are critical for the current sense filter. The components at pins 3, 8, 9, and 10

should be as physically close as possible to the IC, thereby minimizing noise pickup in the PC tracks.

If a current sense transformer is used both leads of the transformer secondary should be routed to the sense

filter components, and to the IC pins. The ground side of the transformer should be connected via a dedicated

PC board track to pin 7 of the IC rather than through the ground plane.

If the current sense circuit employs a sense resistor in the drive transistor sources, a low inductance resistor

should be used. In this case all the noise sensitive low power grounds should be connected in common near the

IC, and then a single connection made to the power ground (sense resistor ground point).

The outputs of the LM5033, or of the high voltage gate driver (if used), should have short direct paths to the

power MOSFETs in order to minimize the effects of inductance in the PC board traces.

If the internal dissipation of the LM5033 and any of the power devices produces high junction temperatures

during normal operation, good use of the PC board’s ground plane can help considerably to dissipate heat. The

exposed pad on the bottom of the WSON-10 package can be soldered to ground plane on the PC board, and the

ground plane should extend out from beneath the IC to help dissipate the heat. The exposed pad is internally

connected to the IC substrate.

Additionally, the use of wide PC board traces where possible can help conduct heat away from the IC. Judicious

positioning of the PC board within the end product, along with use of any available air flow (forced or natural

convection) can help reduce the junction temperatures.

Product Folder Links: LM5033