Datasheet

RT =
(1/F) - 172 x 10
-9
182 x 10
-12
LM5030
www.ti.com SNVS215C –APRIL 2003–REVISED MARCH 2013
The LM5030 CS and PWM comparators are very fast, and as such will respond to short duration noise pulses.
Layout considerations are critical for the current sense filter and sense resistor. The capacitor associated with the
CS filter must be placed very close to the device and connected directly to the pins of the IC (CS and RTN). Also
if a current sense transformer is used, both leads of the transformer secondary should be routed to the sense
resistor, which should also be located close to the IC. If a current sense resistor located in the drive transistor
sources is used, for current sense, a low inductance resistor should be chosen. In this case all of the noise
sensitive low power grounds should be commoned together around the IC and then a single connection should
be made to the power ground (sense resistor ground point).
The second level threshold is intended to protect the power converter by initiating a low duty cycle hiccup mode
when abnormally high, fast rising currents occur. During excessive loading, the first level threshold will always be
reached and the output characteristic of the converter will be that of a current source but this sustained current
level can cause excessive temperatures in the power train especially the output rectifiers. If the second level
threshold is reached, the softstart capacitor will be fully discharged, a retry will commence following the
discharge detection. The second level threshold will only be reached when a high dV/dt is present at the current
sense pin. The signal must be fast enough to reach the second level threshold before the first threshold detector
turns off the driver. This can usually happen for a saturated power inductor or shorted load. Excessive filtering on
the CS pin, extremely low value current sense resistor or an inductor that does not saturate with excessive
loading may prevent the second level threshold from ever being reached.
Oscillator, Shutdown and Sync Capability
The LM5030 oscillator is set by a single external resistor connected between the RT pin and return. To set a
desired oscillator frequency the necessary RT resistor can be calculated as:
(1)
Each output switches at half the oscillator frequency in a Push-Pull configuration. The LM5030 can also be
synchronized to an external clock. The external clock must be of higher frequency than the free running
frequency set by the RT resistor. The clock signal should be capacitively coupled into the RT pin with a 100pF
capacitor. A peak voltage level greater than 3 Volts with respect to ground is required for detection of the sync
pulse. The sync pulse width should be set in the 15 to 150nS range by the external components. The RT resistor
is always required, whether the oscillator is free running or externally synchronized. The voltage at the RT pin is
internally regulated to a nominal 2 Volts.
The RT resistor should be located very close to the device and connected directly to the pins of the IC (RT and
GND).
Slope Compensation
The PWM comparator compares the current sense signal to the voltage derived from the COMP pin. The COMP
voltage is set by either the internal error amplifier or an external error amplifier through an optocoupler. At duty
cycles greater than 50% (composite of alternating outputs) current mode control circuits are prone to
subharmonic oscillation. By adding an additional ramp signal to the current sense ramp signal this condition can
be avoided. The LM5030 integrates this slope compensation by buffering the internal oscillator ramp and
summing it internally to the current sense (CS) signal. Additional slope compensation may be added by
increasing the source impedance of the current sense signal.
Soft Start/ Shutdown
The softstart feature allows the converter to gradually reach the initial steady state operating point, thus reducing
start-up stresses and surges. An internal 10uA current source and an external capacitor generate a ramping
voltage signal which limits the error amplifier output during start-up. In the event of a second level current limit
fault, the softstart capacitor will be fully discharged which disables the output drivers. When the fault condition is
no longer present, the softstart capacitor is released to ramp and gradually restart the converter. The SS pin can
also be used to disable the controller. If the SS pin voltage is pulled down below 0.45V (nominal) the controller
will disable the outputs and enter a low power state.
Copyright © 2003–2013, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: LM5030