Datasheet

UVLO
LM5026
V
PWR
1.25V
Max. Duty
Cycle Limiter
R1A
R1B
R2
Z1
UVLO
LM5026
1.25V
20 PA
Max. Duty
Cycle Limiter
R1
R2
Z1
20 PA
V
PWR
LM5026
SNVS363D –AUGUST 2005–REVISED APRIL 2013 www.ti.com
Figure 33. Altering the Slope of Duty Cycle vs. V
PWR
Programmable Maximum Duty Cycle Clamp (DCL)
When the UVLO pin is biased at 1.25V (minimum operating level), the maximum duty cycle of OUT_A is limited
by the duty cycle of the internal clock signal. The duty cycle of the internal clock can be adjusted by
programming a voltage set at the DCL pin. The default maximum duty cycle (80%) can be selected by
connecting the DCL pin to the RT pin. The DCL pin should not be left open. A small decoupling capacitor located
close to the DCL pin is recommended.
The oscillator frequency set resistance (R
T
) must be determined first before programming the maximum duty
cycle. Following the selection of the total R
T
resistance, the ratio of the R
T
resistors can be designed to set the
desired maximum duty cycle. As the UVLO pin voltage increases from 1.25V, the maximum duty cycle is reduced
by the voltage dependent duty cycle limiter previously as described and illustrated in Figure 22.
Printed Circuit Board Layout
The LM5026 Current Sense and PWM comparators are very fast, and respond to short duration noise pulses.
The components at the CS, COMP, SS, DCL, UVLO, TIME, SYNC and the RT pins should be as physically close
as possible to the IC, thereby minimizing noise pickup on the PC board tracks.
Layout considerations are critical for the current sense filter. If a current sense transformer is used, both leads of
the transformer secondary should be routed to the sense filter components and to the IC pins. The ground side
of each transformer should be connected via a dedicated PC board track to the AGND pin, rather than through
the ground plane.
If the current sense circuit employs a sense resistor in the drive transistor source, low inductance resistor should
be used. In this case, all the noise sensitive low current ground tracks should be connected in common near the
IC, and then a single connection made to the power ground (sense resistor ground point). The gate drive outputs
of the LM5026 should have short direct paths to the power MOSFETs in order to minimize inductance in the PC
board traces.
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