Datasheet
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MAXIMUM DUTY CYCLE (%)
UVLO PIN VOLTAGE (V)
Programmable
Duty Cycle Clamp
Line Voltage
Duty Cycle Limiter
1.25V
RT1
RT2
DCL
RT
AGND
OSCILLATOR
FREQUENCY
INVERSELY
PROPORTIONAL
TO: RT1 + RT2
MAX DUTY CYCLE
CLAMP SET TO:
80% x
RT2
RT1 + RT2
LM5026
Programmable Duty Cycle Clamp =
RT2
RT1 + RT2
80% x
LM5026
www.ti.com
SNVS363D –AUGUST 2005–REVISED APRIL 2013
The main output (OUT_A) duty cycle is normally controlled by the control current sourced into the COMP pin
from the external feedback circuit. When the feedback demands maximum output from the converter, the duty
cycle will be limited by one of two circuits within the LM5026: the user programmable duty cycle clamp and the
voltage-dependent duty cycle limiter, which varies inversely with the input line voltage.
Programmable Duty Cycle Clamp – The maximum allowed duty cycle can be programmed by setting a voltage at
the DCL pin to a value less than 2V. The recommended method to set the DCL pin voltage is with a resistor
divider connected from the RT pin to AGND. The voltage at the RT pin is internally regulated to 2V, while the
current sourced from the RT pin sets the oscillator frequency. The maximum duty can be programmed, according
to the following equation:
(4)
Figure 21. Programming oscillator Frequency and Maximum Duty Cycle Clamp
Line Voltage Duty Cycle Limiter - The maximum duty cycle for the main output driver is also limited by the
voltage at the UVLO pin, which is normally proportional to VIN. The controller outputs are disabled until the
UVLO pin voltage exceeds 1.25V. At the minimum operating voltage (when UVLO = 1.25V) the maximum duty
cycle starts at the duty cycle clamp level programmed by the DCL pin voltage (80% or less). As the line voltage
increases, the maximum duty cycle decreases linearly with increasing UVLO voltage, as illustrated in Figure 22.
Ultimately the duty cycle of the main output is controlled to the least of the following three variables: the duty
cycle controlled by the PWM comparator, the programmable maximum duty cycle clamp, or the line voltage
dependent duty cycle limiter.
Figure 22. Maximum Duty Cycle vs UVLO Voltage
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