Datasheet

Vds(max) =
V
IN
1 - D(max)
PWM
COMPARATOR
5V
1.4V
COMP
SOFT-START
1 : 1
REF
LM431
FB
Potential across Opto-
coupler detector is
constant
LM5026
+
_
CURRENT SENSE RAMP
5k
2R
R
PWM
V
CC
OUT_A
PGND
LM5026
LM5026
SNVS363D –AUGUST 2005–REVISED APRIL 2013 www.ti.com
Figure 19. Compound Gate Driver
PWM Comparator/Slope Compensation
The PWM comparator modulates the pulse width of the controller output by comparing the current sense ramp
signal to the loop error signal. This comparator is optimized for speed in order to achieve minimum controllable
duty cycles. The loop error signal is input into the controller in the form of a control current into the COMP pin.
The COMP pin control current is internally mirrored by a matched pair of NPN transistors which sink current
through a 5 kΩ resistor connected to the 5V reference. The resulting error signal passes through a 1.4V level
shift and a gain reducing 3:1 resistor divider before being applied to the pulse width modulator.
The opto-coupler detector can be connected between the REF pin and the COMP pin. Because the COMP pin is
controlled by a current input, the potential difference across the optocoupler detector is nearly constant. The
bandwidth limiting phase delay which is normally introduced by the significant capacitance of the opto-coupler is
greatly reduced. Greater system loop bandwidth can be realized, since the bandwidth-limiting pole associated
with the opto-coupler is now at a much higher frequency. The PWM comparator polarity is configured such that
with no current into the COMP pin, the controller produces the maximum duty cycle at the main gate driver
output.
Figure 20. Opto-Coupler to LM5026 COMP Interface
For duty cycles greater than 50 percent, current mode control circuits are subject to sub-harmonic oscillation. By
adding an additional fixed slope voltage ramp signal (slope compensation) to the current sense signal, this
oscillation can be avoided. The LM5026 integrates this slope compensation by summing a current ramp
generated by the oscillator with the current sense signal. The PWM comparator ramp signal is a combination of
the current waveform at the CS pin, and an internally generated slope compensation ramp derived from the
oscillator. The internal ramp has an amplitude of 0 to 45 µA which is sourced into an internal 2 kΩ resistor, plus
the external impedance at the CS pin. Additional slope compensation may be added by increasing the source
impedance of the current sense signal.
Maximum Duty Cycle Clamp
Controlling the maximum duty cycle of an active clamp reset PWM controller is necessary to limit the voltage
stress on the main and active clamp MOSFETs. The relationship between the maximum drain-source voltage of
the MOSFETs and the maximum PWM duty cycle is provided by the following equation:
(3)
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