Datasheet

LM5025
SNVS265B DECEMBER 2003REVISED MARCH 2013
www.ti.com
Volt Second Clamp
The Volt x Second Clamp comparator compares the ramp signal (RAMP) to a fixed 2.5V reference. By proper
selection of RFF and CFF, the maximum ON time of the main switch can be set to the desired duration. The ON
time set by Volt x Second Clamp varies inversely with the line voltage because the RAMP capacitor is charged
by a resistor connected to Vin while the threshold of the clamp is a fixed voltage (2.5V). An example will illustrate
the use of the Volt x Second Clamp comparator to achieve a 50% duty cycle limit, at 200KHz, at a 48V line input:
A 50% duty cycle at a 200KHz requires a 2.5µs of ON time. At 48V input the Volt x Second product is 120V x µs
(48V x 2.5µs). To achieve this clamp level:
R
FF
x C
FF
= V
IN
x T
ON
/ 2.5V (1)
48 x 2.5µ / 2.5 = 48µ (2)
Select C
FF
= 470pF. R
FF
= 102k
The recommended capacitor value range for CFF is 100pF to 1000pF.
The C
FF
ramp capacitor is discharged at the conclusion of every cycle by an internal discharge switch controlled
by either the internal clock or by the V x S Clamp comparator, whichever event occurs first.
Current Limit
The LM5025 contains two modes of over-current protection. If the sense voltage at the CS1 input exceeds 0.25V
the present power cycle is terminated (cycle-by-cycle current limit). If the sense voltage at the CS2 input exceeds
0.25V, the controller will terminate the present cycle, discharge the softstart capacitor and reduce the softstart
current source to 1µA. The softstart (SS) capacitor is released after being fully discharged and slowly charges
with a 1µA current source. When the voltage at the SS pin reaches approximately 1V, the PWM comparator will
produce the first output pulse at OUT_A. After the first pulse occurs, the softstart current source will revert to the
normal 20µA level. Fully discharging and then slowly charging the SS capacitor protects a continuously over-
loaded converter with a low duty cycle hiccup mode.
These two modes of over-current protection allow the user great flexibility to configure the system behavior in
over-load conditions. If it is desired for the system to act as a current source during an over-load, then the CS1
cycle-by-cycle current limiting should be used. In this case the current sense signal should be applied to the CS1
input and the CS2 input should be grounded. If during an overload condition it is desired for the system to briefly
shutdown, followed by softstart retry, then the CS2 hiccup current limiting mode should be used. In this case the
current sense signal should be applied to the CS2 input and the CS1 input should be grounded. This shutdown /
soft-start retry will repeat indefinitely while the over-load condition remains. The hiccup mode will greatly reduce
the thermal stresses to the system during heavy overloads. The cycle-by-cycle mode will have higher system
thermal dissipations during heavy overloads, but provides the advantage of continuous operation for short
duration overload conditions.
In some systems it is possible utilize both modes concurrently, whereby slight overload conditions activate the
CS1 cycle-by cycle mode while more severe overloading activates the CS2 hiccup mode. Operating both modes
concurrently, requires that the slope of the inductor current be sufficient to reach the CS2 threshold before the
CS1 function turns off the main output switch. This requires a high dv/dt at the current sense pin. The signal
must be fast enough to reach the second level threshold before the first threshold detector (CS1) turns off the
gate driver. Excessive filtering on the CS pin, an extremely low value current sense resistor or an inductor that
does not saturate with excessive loading may prevent the second level threshold from ever being reached.
A small RC filter, located near the controller, is recommended for each of the CS pins. Each CS input has an
internal FET which discharges the current sense filter capacitor at the conclusion of every cycle, to improve
dynamic performance. This same FET remains on an additional 50ns at the start of each main switch cycle to
attenuate the leading edge spike in the current sense signal.
The LM5025 CS comparators are very fast and may respond to short duration noise pulses. Layout
considerations are critical for the current sense filter and sense resistor. The capacitor associated with the CS
filter must be placed very close to the device and connected directly to the pins of the IC (CS and GND). If a
current sense transformer is used, both leads of the transformer secondary should be routed to the filter
network , which should be located close to the IC. If a sense resistor in the source of the main switch MOSFET is
used for current sensing, a low inductance type of resistor is required. When designing with a current sense
resistor, all of the noise sensitive low power ground connections should be connected together near the IC GND
and a single connection should be made to the power ground (sense resistor ground point).
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