Datasheet

( )
( )
R1 R2
RFF :
R1 R2
=
+
g
used
Lp Coss
2
Cd :
RFF
é ù
p
æ ö
ç ÷
ê ú
è ø
ë û
=
g g
tdly RFF Cd= ·
tdly Lp COSS
2
p
= · ·
R1
R2 3.0V
Vaux _ OVP 3V
= ·
-
OVP
R2
V Vaux _ OVP
R1 R2
= ·
+
LM5023
SNVS961D –APRIL 2013–REVISED JANUARY 2014 www.ti.com
Overvoltage Protection
Output overvoltage protection is implemented with the LM5023 by monitoring the QR pin during the time when
the main Flyback MOSFET is off and the energy stored in the transformer primary is being transferred to the
secondary. There is a delay prior to sampling the QR pin during the MOSFETs off time, TOVP. There are two
reasons for the delay, the first is to blank the voltage spike which is a result of the transformers leakage
inductance. The second is to improve the accuracy of the output voltage sensing, referring to the transformer
auxiliary winding voltage shown in Figure 11. It is clear there is a down slope in the voltage which represents the
decreasing VF of the output rectifier and resistance voltage drop (IS x RS) as the secondary current decreases
to zero, so by delaying the sampling of the QR voltage a more accurate representation of the output voltage is
achieved.
Connected to the QR pin is a comparator with a 3.0 V reference. The transformers auxiliary voltage is
proportional to Vout by the transformers turns ratio:
Vaux=(V
O
+V
F
)·Naux/Ns
(1)
To set the OVP, a voltage divider is connected to the transformers auxiliary winding, refer to Figure 13. In the
section titled Line Current Limit Feed Forward, we developed equations to improve the power limit. Resistor R1
was calculated for Line Current Limit Feed Forward; to implement OVP we now need to calculate R2.
When an OVP fault has been detected, the LM5023 OUT driver is latched-off. VCC will discharge to VCCMIN
and the VSD pin will be asserted high, allowing the Depletion Mode FET to turn-on and charge up the VCC
capacitor to VCC
ON
. The VSD pin will be toggled on-off-on to maintain VCC to the controller. The only way to
clear the fault is to removed the input power and allow the controllers VCC voltage to drop below V
RST
, 5.0 V.
Valley Switching
For QR operation the Flyback MOSFET is turned on with the minimum Drain voltage. The delay on the auxiliary
winding can be adjusted with an external resistor and capacitor to improve valley switching. The delay-time, tdly,
must equal half of the natural oscillation period:
By substituting
We can calculate the RC time constant to achieve the minimum Drain voltage when the LM5023 turns on the
Flyback MOSFET.
The LM5023 QR pin’s capacitance is approximately 20 pF, so CdUSED = Cd -20 pF
R1 and R2 were previously calculated to set the Line Current Limit Feed Forward and Overvoltage protection.
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