Datasheet

LM5023
www.ti.com SNVS961D –APRIL 2013–REVISED JANUARY 2014
voltage loop compensation network. Eventually the COMP voltage will increase when the voltage loop requires
more current to sustain the regulated output voltage. When the PWM comparator input exceeds 135 mV (10 mV
hysteresis), normal fixed frequency switching resumes. Typical light load operation power supply designs will
produce a short burst of output pulses followed by a long skip cycle interval (no drive pulses). The result is a
large reduction in the average input power.
Figure 12. LM5023 Modulation Curve
Current Limit/Current Sense
The LM5023 provides a cycle-by-cycle over current protection feature. Current limit is triggered by an internal
current sense comparator with a threshold of 500 mV. If the CS pin voltage plus the current limit feed forward
signal voltage exceeds 500 mV, the MOSFET drive signal (OUT) will be terminated. An RC filter, located near
the LM5023 CS pin is recommended to attenuate the noise coupled from the power FET’s gate to source
switching. The CS pin capacitance is discharged at the end of each PWM cycle by an internal switch. The
discharge switch remains on for an additional 90 ns for Leading Edge Blanking (LEB). LEB prevents the LM5023
current sense comparator from being falsely triggered due to the noise generated by the switch currents initial
spike. The LM5023 current sense comparator is very fast, and may respond to short duration noise pulses.
Layout considerations are critical for the current sense filter and sense resistor. The capacitor associated with the
CS filter must be placed very close to the device and connected directly to the pins of the IC (CS and GND). If a
current sense transformer is used, both leads of the transformer secondary should be routed to the sense
resistor, which should also be located close to the IC. If a current sense resistor located in the power FET’s
source is used for current sense, a low inductance resistor is required. In this case, all of the noise sensitive low
current grounds should be connected in common near the IC and then a single connection should be made.
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