Datasheet

0
45 PA
2 k:
LM5022
I
SW
R
S2
R
S1
R
SNS
C
SNS
CS
V
CL
+
-
0.5V
Current
Limit
LM5022
SNVS480G –JANUARY 2007–REVISED DECEMBER 2013 www.ti.com
PWM COMPARATOR AND SLOPE COMPENSATION
The PWM comparator compares the current ramp signal with the error voltage derived from the error amplifier
output. The error amplifier output voltage at the COMP pin is offset by 1.4V and then further attenuated by a 3:1
resistor divider. The PWM comparator polarity is such that 0V on the COMP pin will result in a zero duty cycle at
the controller output. For duty cycles greater than 50%, current mode control circuits can experience sub-
harmonic oscillation. By adding an additional fixed-slope voltage ramp signal (slope compensation) this
oscillation can be avoided. Proper slope compensation damps the double pole associated with current mode
control (see CONTROL LOOP COMPENSATION) and eases the design of the control loop compensator. The
LM5022 generates the slope compensation with a sawtooth-waveform current source with a slope of 45 µA x f
SW
,
generated by the clock. (See Figure 15) This current flows through an internal 2 kΩ resistor to create a minimum
compensation ramp with a slope of 100 mV x f
SW
(typical). The slope of the compensation ramp increases when
external resistance is added for filtering the current sense (R
S1
) or in the position R
S2
. As shown in Figure 15 and
the block diagram, the sensed current slope and the compensation slope add together to create the signal used
for current limiting and for the control loop itself.
Figure 15. Slope Compensation
In peak current mode control the optimal slope compensation is proportional to the slope of the inductor current
during the power switch off-time. For boost converters the inductor current slope while the MOSFET is off is (V
O
-
V
IN
) / L. This relationship is combined with the requirements to set the peak current limit and is used to select
R
SNS
and R
S2
in Design Considerations.
SOFT-START
The soft-start feature allows the power converter output to gradually reach the initial steady state output voltage,
thereby reducing start-up stresses and current surges. At power on, after the VCC and input under-voltage
lockout thresholds are satisfied, an internal 10 µ A current source charges an external capacitor connected to the
SS pin. The capacitor voltage will ramp up slowly and will limit the COMP pin voltage and the switch current.
MOSFET GATE DRIVER
The LM5022 provides an internal gate driver through the OUT pin that can source and sink a peak current of 1A
to control external, ground-referenced N-channel MOSFETs.
THERMAL SHUTDOWN
Internal thermal shutdown circuitry is provided to protect the LM5022 in the event that the maximum junction
temperature is exceeded. When activated, typically at 165°C, the controller is forced into a low power standby
state, disabling the output driver and the VCC regulator. After the temperature is reduced (typical hysteresis is
25°C) the VCC regulator will be re-enabled and the LM5022 will perform a soft-start.
Design Considerations
The most common circuit controlled by the LM5022 is a non-isolated boost regulator. The boost regulator steps
up the input voltage and has a duty ratio D of:
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