Datasheet
RT =
6.63 x 10
9
2 x F
SW
RT =
6.63 x 10
9
F
SW
LM5021
SNVS359D –MAY 2005–REVISED MARCH 2013
www.ti.com
The LM5021 CS comparator is very fast, and may respond to short duration noise pulses. Layout considerations
are critical for the current sense filter and sense resistor. The capacitor associated with the CS filter must be
placed very close to the device and connected directly to the pins of the IC (CS and GND). If a current sense
transformer is used, both leads of the transformer secondary should be routed to the sense resistor, which
should also be located close to the IC. If a current sense resistor located in the power FET's source is used for
current sense, a low inductance resistor is required. In this case, all of the noise sensitive low current grounds
should be connected in common near the IC and then a single connection should be made to the power ground
(sense resistor ground point).
OSCILLATOR, SHUTDOWN and SYNC CAPABILITY
A single external resistor connected between RT and GND pins sets the LM5021 oscillator frequency. The
LM5021-2 device, with 50% maximum duty cycle, includes an internal flip-flop that divides the oscillator
frequency by two. This method produces a precise 50% maximum duty cycle limit. Because of this frequency
divider, the oscillator frequency of the LM5021-2 is actually twice the frequency of the gate drive output (OUT).
For the LM5021-1 device, the oscillator frequency and the operational output frequency are the same. To set a
desired output switching frequency (Fsw), the RT resistor can be calculated from:
LM5021-1:
(6)
LM5021-2:
(7)
The LM5021 can also be synchronized to an external clock. The external clock must have a higher frequency
than the free running oscillator frequency set by the RT resistor. The clock signal should be capacitively coupled
into the RT pin with a 100pF capacitor. A peak voltage level greater than 3.8 Volts at the RT pin is required for
detection of the sync pulse. The dc voltage across the RT resistor is internally regulated at 2 volts. Therefore, the
ac pulse superimposed on the RT resistor must have 1.8V or greater amplitude to successfully synchronize the
oscillator. The sync pulse width should be set between 15ns to 150ns by the external components. The RT
resistor is always required, whether the oscillator is free running or externally synchronized. The RT resistor
should be located very close to the device and connected directly to the pins of the LM5021 (RT and GND).
GATE DRIVER and MAX DUTY CYCLE LIMIT
The LM5021 provides a gate driver (OUT), which can source peak current of 0.3A and sink 0.7A. The LM5021 is
available in two duty-cycle limit options. The maximum output duty-cycle is typically 80% for the LM5021-1
option, and precisely equal to 50% for the LM5021-2 option. The maximum duty cycle function for the LM5021-2
is accomplished with an internal toggle flip-flop to ensure an accurate duty cycle limit. The internal oscillator
frequency of the LM5021-2 is therefore twice the switching frequency of the PWM controller (OUT pin).
The 80% maximum duty-cycle function for the LM5021-1 is determined by the internal oscillator. For the
LM5021-1 the internal oscillator frequency and the switching frequency of the PWM controller are the same.
SOFT-START
The soft-start feature allows the power converter to gradually reach the initial steady state operating point, thus
reducing start-up stresses and current surges. An internal 22 µA current source charges an external capacitor
connected to the SS pin. The capacitor voltage will ramp up slowly, limiting the COMP pin voltage and the duty
cycle of the output pulses. The soft-start capacitor is also used to generate the hiccup mode delay time when the
output of the switching power supply is continuously overloaded.
HICCUP MODE OVERLOAD CURRENT LIMITING
Hiccup mode is a method of protecting the power supply from over-heating and damage during an extended
overload condition. When the output fault is removed the power supply will automatically restart.
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