Datasheet

+
+
+
+
V
IN
BST
RON
RTN
SW
VCC
FB
UVLO
VIN
VOUT1
VOUT2
R
FB1
R
UV1
R
ON
C
OUT1
C
BST
D1
C
IN
C
OUT2
R
FB2
R
UV2
X1
R
r
N
P
N
S
LM5017
C
VCC
+
D2
20V-100V
C
r
C
ac
N
S
V
OUT2
= V
OUT1
x
N
P
- V
F
+
+
+
V
IN
BST
RON
RTN
SW
VCC
FB
VIN
VOUT
R2
R7
R3
C9
C1
C4
R1
R5
L1
UVLO
C7
LM5017
12V-95V
1
2
3
4
5
6
8
7
(TP4)
+
C5
2.2 F 0.47 F
127 N
14 N
499 N
GND
(TP1)
(TP2)
UVLO/SD
U1
R6
(TP3)
(TP5)
GND
R4
C6
C8
+
D2
R8
EXP
0
1 N
6.98 N
22 F
0
220 H
0.01 F
1 F
3300 pF
0.1 F
46.4 N
(TP6)
SW
R
UV2
V
IN
(UVLO,rising) = 1.225V x
R
UV1
+ 1
( )
LM5017
www.ti.com
SNVS783G JANUARY 2012REVISED DECEMBER 2013
and
where I
HYS
= 20 μA. Setting UVLO hysteresis of 2.5 V and UVLO rising threshold of 12 V results in R
UV1
= 14.53
k and R
UV2
= 125 k. Selecting standard value of R
UV1
= 14 k and R
UV2
= 125 k results in UVLO thresholds
and hysteresis of 12.4 V and 2.5 V respectively.
Application Circuit: 12 V TO 95 V Input and 10 V, 500 mA Output Buck Converter
The application schematic of a buck supply is shown in Figure 17. For output voltage (V
OUT
) above the maximum
regulation threshold of V
CC
(8.55 V, see Electrical Characteristics), the V
CC
pin can be connected to V
OUT
through
a diode (D2), as shown below, for higher efficiency and lower power dissipation in the IC.
Figure 17. Final Schematic for 12V to 95V Input, and 10V, 500mA Output Buck Converter
Isolated DC-DC Converter Using LM5017
An isolated supply using LM5017 is shown in Figure 18. Inductor (L) in a typical buck circuit is replaced with a
coupled inductor (X1). A diode (D1) is used to rectify the voltage on a secondary output. The nominal voltage at
the secondary output (V
OUT2
) is given by:
where VF is the forward voltage drop of D1, and NP, NS are the number of turns on the primary and secondary
of coupled inductor X1. For output voltage (V
OUT1
) above the maximum V
CC
(8.55 V), the V
CC
pin can be diode
connected to V
OUT1
for higher effiicency and low dissipation in the IC. See AN-2204 (SNVA611) for a complete
isolated bias design with LM5017.
Figure 18. Typical Isolated Application Schematic
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