Datasheet
Table Of Contents
S
GND
V
IN
SW
FB
BST
LM5010
SHUTDOWN
V
CC
SS
R
ON
/ SD
15 - 75V
Input
137k
C1
2.2 PF
R
ON
R2
1.0k
R1
3.0k
R3
2.8
GND
C2
15 PF
V
OUT
10V
L1
100 PH
C3
0.1 PF
C4
0.022 PF
D1
C5
0.1 PF
C6
0.022 PF
RTN
I
SEN
t
SS
=
11.5 PA
C6 x 2.5V
C1 =
'V
I
O
x t
ON
= 1.57 PF
1V
1.0A x 1.57 Ps
=
t
ON(max)
=
15V - 1.4V
1.18 x 10
-10
x (137k + 1.4k) x 1.25
+ 67 ns = 1.57 Ps
LM5010
SNVS307F –SEPTEMBER 2004–REVISED FEBRUARY 2013
www.ti.com
(17)
C1 is calculated from:
(18)
where I
O
is the load current, and ΔV is the allowable ripple voltage at V
IN
(1V for this example). Quality ceramic
capacitors with a low ESR should be used for C1. To allow for capacitor tolerances and voltage effects, a 2.2 µF
capacitor will be used
C3: The capacitor at the V
CC
pin provides not only noise filtering and stability, but also prevents false triggering of
the V
CC
UVLO at the buck switch on/off transitions. For this reason, C3 should be no smaller than 0.1 µF, and
should be a good quality, low ESR, ceramic capacitor. This capacitor also determines the initial startup delay (t1
in Figure 8).
C4: The recommended value for C4 is 0.022 µF. A high quality ceramic capacitor with low ESR is recommended
as C4 supplies the surge current to charge the buck switch gate at turn-on. A low ESR also ensures a complete
recharge during each off-time.
C5: This capacitor suppresses transients and ringing due to long lead inductance at V
IN
. A low ESR, 0.1 µF
ceramic chip capacitor is recommended, located physically close to the LM5010.
C6: The capacitor at the SS pin determines the soft start time, i.e. the time for the reference voltage at the
regulation comparator, and the output voltage, to reach their final value. The time is determined from the
following:
(19)
For a 5 ms soft start time, C6 calculates to 0.022 µF.
FINAL CIRCUIT
The final circuit is shown in Figure 14, and its performance is shown in Figure 15 to Figure 18.
Figure 14. LM5010 Example Circuit
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