Datasheet

VIN

VCC

UVO

BST

RTN

LM5006

SNVS646B –FEBRUARY 2011–REVISED MARCH 2013

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Connection Diagram

Figure 1. Top View

10–Lead VSSOP

PIN DESCRIPTIONS

Pin Name Description Application Information

1 SW Switching Node Power switching node. Connect to the output inductor, re-circulating diode or

synchronous FET, and bootstrap capacitor.

2 BST Boost Pin An external capacitor is required between the BST and the SW pins (0.01uF or

greater ceramic). The BST pin capacitor is charged from Vcc through an internal

diode when SW is low.

3 LG Low side gate driver output for This output drives an external N-MOSFET which can replace the free-wheeling

synchronous rectifier MOSFET diode between SW and GND. Using a FET for synchronous rectification

generally improves efficiency.

4 RTN Ground pin Ground for the entire circuit.

5 UV Input pin for the under voltage A resistor divider from VIN, or some other system voltage, programs the under-

indicator voltage detection threshold. An internal current sink is enabled when UV is

below 2.5V to provide hysteresis.

6 UVO Under voltage status indicator This open drain output is high when the UV pin voltage is below 2.5V, or when

the VCC

UVLO

function or the shutdown function is invoked.

7 FB Feedback Input from Regulated This pin is connected to the inverting input of the internal regulation comparator.

Output The regulation level is 2.5V.

8 RT/SD On-time set pin and shutdown input A resistor between this pin and Vin sets the switch on-time as a function of Vin,

and the frequency. The minimum recommended on-time is 200 ns at max input

voltage. Taking this pin to ground shuts off the regulator.

9 VCC Output from the internal high voltage The internal regulator provides bias supply for the Buck switch gate driver and

series pass regulator. Regulated at other internal circuitry. A 1uF ceramic capacitor to ground is required. The

7.5V. regulator is current limited to ≈30 mA.

10 VIN Input Voltage The operating input range is 6V to 75V

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Product Folder Links: LM5006