Datasheet

VIN
SW
DRIVER
PWM
RT
CLK
VCC
HV-LDO
EN
FB
GND
5k
COMP
MAX DUTY
SHUTDOWN
STANDBY
UVLO
CLK
(Leading Edge Blanking)
RAMP
S
R
Q
VCC
ENABLE
ENABLE
Disable
VCC
ENABLE
CS
CS
RAMP
CS
SLOPE COMP RAMP
450 mV
0
+
Disable
ENABLE
CLK
×
CURRENT
LIMIT
1.5V
1.3V
+5V
1.26V
CURRENT
SENSE
100 m:
1.26V
+5V
+6.9V
2.8V
0.45V
6 PA
REFERENCE
GENERATOR
Av = 30
0.7
THERMAL
STANDBY
(165
o
C)
OSCILLATOR
WITH
SYNC
CAPABILITY
1.26V
+
-
+
-
+
-
+
-
+
-
-
+
+
-
LM5002
www.ti.com SNVS496D –JANUARY 2007–REVISED MARCH 2013
Block Diagram
FUNCTIONAL DESCRIPTION
The LM5002 high voltage switching regulator features all the functions necessary to implement an efficient boost,
flyback, SEPIC or forward current mode power converter. The operation can be best understood by referring to
the block diagram. At the start of each cycle, the oscillator sets the driver logic and turns on the power MOSFET
to conduct current through the inductor or transformer. The peak current in the MOSFET is controlled by the
voltage at the COMP pin. The COMP voltage will increase with larger loads and decrease with smaller loads.
This voltage is compared with the sum of a voltage proportional to the power MOSFET current and an internally
generated Slope Compensation ramp. Slope Compensation is used in current mode PWM architectures to
eliminate sub-harmonic current oscillation that occurs with static duty cycles greater than 50%. When the
summed signal exceeds the COMP voltage, the PWM comparator resets the driver logic, turning off the power
MOSFET. The driver logic is then set by the oscillator at the end of the switching cycle to initiate the next power
period.
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