Datasheet
LM49370
SNAS356D –FEBRUARY 2007–REVISED MARCH 2012
www.ti.com
DETECT CONFIGURATION REGISTER
This register is used to control the headset detection system.
Table 30. DETECT (0x17h)
Bits Field Description
0 DET_INT If set, an IRQ is raised when a change is detected in the headset status. Clearing this bit will clear an IRQ
that has been triggered by the headset detect.
1 BTN_INT If set, an IRQ is raised when the headset button is pressed. Clearing this bit will clear an IRQ that has been
triggered by a button event.
2 TEMP_INT If set, an IRQ is raised during a temperature event. The LM49370 will still automatically cycle the class AB
power amplifiers off if the internal temperature is too high. This bit should not be set whenever the class D
amplifier is turned on. Clearing this bit will clear an IRQ that has been triggered by a temperature event.
6:3 HS_ This sets the time used for debouncing the analog signals from the detection inputs used to sense the
DBNC_TIME insertion/removal of a headset.
HS_DBNC_TIME Time (ms)
0000
2
0
0001
2
8
0010
2
16
0011
2
32
0100
2
48
0101
2
64
0110
2
96
0111
2
128
1000
2
192
1001
2
256
1010
2
384
1011
2
512
1100
2
768
1101
2
1024
1110
2
1536
1111
2
2048
HEADSET DETECT OVERVIEW
The LM49370 has built in monitors to automatically detect headset insertion or removal. The detection scheme
can differentiate between mono, stereo, mono-cellular and stereo-cellular headsets. Upon detection of headset
insertion or removal, the LM49370 updates read-only bit 0 - headset absence/presence, bit 1- mono/stereo
headset and bit 2 - headset without mic / with mic, of the STATUS register (0x18h). Headset insertion/removal
and headset type can also be detected in standby mode; this consumes no analog supply current when the
headset is absent.
The LM49370 can be programmed to raise an interrupt (set the IRQ pin high) when headset insert/removal is
sensed by setting bit 0 of DETECT (0x17h). When headset detection is enabled in active mode and a headset is
not detected, the HPL_OUT and HPR_OUT amplifiers will be disabled (switched off for capless mode and muted
for AC-coupled mode) and the EXT_BIAS pin will be disconnected from the MIC_BIAS amplifier, irrespective of
control register settings.
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