Datasheet
LM4936
SNAS269A –APRIL 2005–REVISED APRIL 2013
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Table 1. I
2
C/SPI Interface Controls
(1)
B7 B6 B5 B4 B3 B2 B1 B0
I
2
C
1 1 0 1 1 0 ID 0
Address
Mode
HP
Control 0 0 0 Gain Sel Mode Mute Shutdown
Control
Register
Volume
Control
Register 1 0 0 V4 V3 V2 V1 V0
(See Table
4 )
(1) If system beep is detected on the Beep In pin, the system beep will be passed through the bridged amplifier regardless of the logic of
the Mute and HP Control bits (B1, B4) and HP Sense pin.
Table 2. Headphone Control
HP Sense Pin I
2
C/SPI HP Control (B4) Output Stage Configuration
0 0 BTL
0 1 SE
1 (V
DD
) 0 SE
1 (V
DD
) 1 SE
Table 3. Logic Controls
Logic Level B3 (Gain Sel) B2 (Mode) B1 (Mute) B0 (Shutdown) I
2
C/SPI Select
0 Internal Gain Fixed Volume, 0dB Mute Off (Play) Device Shutdown I
2
C mode
1 External Gain Adjustable Volume Mute On Device Active SPI mode
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