Datasheet

LM49350, LM49350RLEVAL
SNAS359D –SEPTEMBER 2008–REVISED JUNE 2012 www.ti.com
Table 42. CLK_GEN_1 (0x53h/63h)
Bits Field Description
2:0 SYNC_RATE This sets the number of clock cycles before the sync pattern repeats. This depends if the audio port data
is mono or stereo.
In MONO mode:
SYNC_RATE Number of Clock Cycles
000 8
001 12
010 16
011 18
100 20
101 24
110 25
111 32
In STEREO mode:
SYNC_RATE Number of Clock Cycles
000 16
001 24
010 32
011 36
100 40
101 48
110 50
111 64
5:3 SYNC_WIDTH In MONO mode, this programs the width (in number of bits) of the SYNC signal.
SYNC_WIDTH Width of SYNC (in bits)
000 1
001 2
010 4
011 7
100 8
101 11
110 15
111 16
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