Datasheet

0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9

PCM_CLK

PCM_SDO/

PCM_SDI

PCM_SYNC

Short frame sync mode

Long frame sync mode

LM49350, LM49350RLEVAL

SNAS359D –SEPTEMBER 2008–REVISED JUNE 2012

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Figure 62. PCM Serial Data Format (16 bit example)

The following registers are used to control the LM49350's audio ports. Audio Port 1 and Audio Port 2 are

identical. Port 1 is programmed through the (0x5Xh) registers. Port 2 is programmed through the (0x6Xh)

registers.

Table 39. BASIC_SETUP (0x50h/0x60h)

Bits Field Description

0 STEREO If set, the audio port will receive and transmit stereo data.

1 RX_ENABLE If set the input is enabled (enables the SDI port and input shift register and any clock

generation required).

2 TX_ENABLE If set the output is enabled (enables the SDO port and output shift register and any clock

generation required).

3 CLOCK_MS If set the audio port will transmit the clock when either the RX or TX is enabled.

4 SYNC_MS If set the audio port will transmit the sync signal when either the RX or TX is enabled.

5 CLOCK_PHASE This sets how data is clocked by the Audio Port.

CLOCK_PHASE Audio Data Mode

0 I

S (TX on falling edge, RX on rising edge)

1 PCM (TX on rising edge, RX on falling edge)

6 STEREO_SYNC_PHASE If set, this reverses the left and right channel data of the Audio Port.

STEREO_SYNC_PHASE Audio Port Data Orientation

0 Left channel data goes to left channel output.

Right channel data goes to right channel output.

1 Right channel data goes to left channel output.

Left channel data goes to right channel output.

7 SYNC_INVERT If this bit is set the SYNC is inverted before the receiver and transmitter.

SYNC_INVERT Sync Orientation

0 SYNC Low = Left, SYNC High = Right

1 SYNC Low = Right, SYNC High = Left

Product Folder Links: LM49350 LM49350RLEVAL