Datasheet

LM49350, LM49350RLEVAL
SNAS359D –SEPTEMBER 2008–REVISED JUNE 2012 www.ti.com
Table 13. PLL1_P2 (0x08h)
Bits Field Description
7:0 PLL1_P2[7:0] This programs 8 LSBs of PLL1's P2 Divider. These LSBs combine with PLL1_P2[8] which allows
the P2 divider to divide by up to 256
PLL1_P2 P2 Divider Value
000000000 1
000000001 1
000000010 1.5
000000011 2
000000100 2.5
000000101 3
— —
111111101 255
111111110 255.5
111111111 256
Table 14. PLL2_M (0x09h)
Bits Field Description
6:0 PLL2_M This programs the PLL2 M divider to divide from 1 to 64.
PLL2_M PLL2 Input Divider Value
0000000 1
0000001 1
0000010 1.5
0000011 2
0000100 2.5
0000101 3
— —
1111101 63
0000010 63.5
1111111 64
Table 15. PLL2_N (0x0Ah)
Bits Field Description
7:0 PLL2_N This programs PLL2's N divider to divide from 10 to 250.
PLL2_N Comment
00000000 to 00001010 10
00001011 11
00001100 12
00001101 13
00001110 14
00001111 15
— —
11111000 248
11111001 249
11111010 to 11111111 250
38 Submit Documentation Feedback Copyright © 2008–2012, Texas Instruments Incorporated
Product Folder Links: LM49350 LM49350RLEVAL