Datasheet

LM4890
www.ti.com SNAS138L –SEPTEMBER 2001–REVISED MAY 2013
Electrical Characteristics V
DD
= 5V
(1)(2)(3)
The following specifications apply for the circuit shown in Figure 7 unless otherwise specified. Limits apply for T
A
= 25°C.
LM4890
Units
Parameter Test Conditions
(Limits)
Typical
(4)
Limit
(5) (6)
I
DD
Quiescent Power Supply Current V
IN
= 0V, I
o
= 0A, No Load 4 8 mA (max)
V
IN
= 0V, I
o
= 0A, 8Ω Load 5 10 mA (max)
I
SD
Shutdown Current V
SHUTDOWN
= 0V 0.1 2.0 µA (max)
V
SDIH
Shutdown Voltage Input High 1.2 V (min)
V
SDIL
Shutdown Voltage Input Low 0.4 V (max)
V
OS
Output Offset Voltage 7 50 mV (max)
R
OUT-GND
Resistor Output to GND
(7)
9.7 kΩ (max)
8.5
7.0 kΩ (min)
P
o
Output Power (8Ω) THD = 2% (max); f = 1 kHz 1.0 0.8 W
T
WU
Wake-up time 170 220 ms (max)
T
SD
Thermal Shutdown Temperature 150 °C (min)
170
190 °C (max)
THD+N Total Harmonic Distortion + Noise P
o
= 0.4 Wrms; f = 1kHz 0.1 %
PSRR Power Supply Rejection Ratio
(8)
V
ripple
= 200mV sine p-p 62 (f = 217Hz) 55 dB (min)
Input Terminated with 10 ohms to 66 (f = 1kHz)
ground
T
SDT
Shut Down Time 8 Ω load 1.0 ms (max)
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) For DSBGA only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase I
SD
by a
maximum of 2µA.
(4) Typicals are measured at 25°C and represent the parametric norm.
(5) Limits are specified to TI's AOQL (Average Outgoing Quality Level).
(6) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
(7) ROUT is measured from each of the output pins to ground. This value represents the parallel combination of the 10k ohm output
resistors and the two 20k ohm resistors.
(8) PSRR is a function of system gain. Specifications apply to the circuit in Figure 7 where A
V
= 2. Higher system gains will reduce PSRR
value by the amount of gain increase. A system gain of 10 represents a gain increase of 14dB. PSRR will be reduced by 14dB and
applies to all operating voltages.
Electrical Characteristics V
DD
= 3V
(1)(2)(3)
The following specifications apply for the circuit shown in Figure 7 unless otherwise specified. Limits apply for T
A
= 25°C.
LM4890
Units
Parameter Test Conditions
(Limits)
Typical
(4)
Limit
(5) (6)
I
DD
Quiescent Power Supply Current V
IN
= 0V, I
o
= 0A, No Load 3.5 7 mA (max)
V
IN
= 0V, I
o
= 0A, 8Ω Load 4.5 9 mA (max)
I
SD
Shutdown Current V
SHUTDOWN
= 0V 0.1 2.0 µA (max)
V
SDIH
Shutdown Voltage Input High 1.2 V(min)
V
SDIL
Shutdown Voltage Input Low 0.4 V(max)
(1) All voltages are measured with respect to the ground pin, unless otherwise specified.
(2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(3) For DSBGA only, shutdown current is measured in a Normal Room Environment. Exposure to direct sunlight will increase I
SD
by a
maximum of 2µA.
(4) Typicals are measured at 25°C and represent the parametric norm.
(5) Limits are specified to TI's AOQL (Average Outgoing Quality Level).
(6) Datasheet min/max specification limits are specified by design, test, or statistical analysis.
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