Datasheet

START MSB DEVICE ADDRESS LSB
ACK
SCL
SDA
STOPMSB REGISTER DATA LSB
ACK
R/W
LM48100Q
www.ti.com SNAS470D –OCTOBER 2008–REVISED MARCH 2013
Figure 16. Example Write Sequence
Table 1. Device Address
B7 B6 B5 B4 B3 B2 B1 B0 R/W
ADR = 0 1 1 1 1 1 0 0 0
ADR = 1 1 1 1 1 1 0 1 0
Table 2. I
2
C Control Registers
Register
Register Name B7 B6 B5 B4 B3 B2 B1 B0
Address
0 MODE CONTROL 0 0 0 POWER_ON INPUT_2 INPUT_1 0 0
DIAGNOSTIC
1 0 0 1 DG_EN DG_CONT DG_RESET ILIMIT 0
CONTROL
FAULT DETECTION OUTPUT OUTPUT
2 0 1 0 TSD OCF RAIL_SHT
CONTROL _OPEN _SHORT
VOLUME CONTROL
3 0 1 1 VOL1_4 VOL1_3 VOL1_2 VOL1_1 VOL1_0
1
VOLUME CONTROL
4 1 0 0 VOL2_4 VOL2_3 VOL2_2 VOL_2 VOL2_0
2
Table 3. Mode Control Registers
BIT NAME VALUE DESCRIPTION
B0, B1 RESERVED 0 Unused
0 IN1 Input unselected
B2 INPUT_1
1 IN1 Input selected
0 IN2 Input unselected
B3 INPUT_2
1 IN2 Input selected
0 Device Disabled
B4 POWER_ON
1 Device Enabled
DIAGNOSTIC CONTROL
The LM48100Q output fault diagnostics are controlled through the I
2
C interface. When power is initially applied to
the device, the LM48100Q initializes, performing the full diagnostic sequence; output short to V
DD
and GND,
outputs shorted together, and no load condition, is performed. The device remains in shutdown while the initial
diagnostic check is performed. Any I
2
C commands written to the device during this time are stored and
implemented once the diagnostic check is complete. The initial diagnostic sequence can be terminated by setting
DG_RESET = 1.
The Diagnostic Control register, register 1, controls the LM48100Q diagnostic process. Bit B4, DG_EN, enables
the output fault detection. Set DG_EN = 1 to enable the output diagnostic test sequence. The LM48100Q treats
the DG_EN bit as rising-edge-sensitive; once DG_EN = 1 is clocked into the device, the diagnostic test is
performed. If the LM48100Q is in one-shot mode, once the test sequence is performed, the DG_EN bit is ignored
and the test sequence will not be run again. Cycle DG_EN from high-to-low-to-high to re-enable the one-shot
diagnostic test sequence.
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