Datasheet
LM4766
SNAS031F –SEPTEMBER 1998–REVISED MARCH 2013
www.ti.com
APPLICATION INFORMATION
MUTE MODE
The muting function of the LM4766 allows the user to mute the music going into the amplifier by drawing more
than 0.5mA out of each mute pin on the device. This is accomplished as shown in the Typical Application Circuit
where the resistor R
M
is chosen with reference to your negative supply voltage and is used in conjunction with a
switch. The switch when opened cuts off the current flow from pin 6 or 11 to −V
EE
, thus placing the LM4766 into
mute mode. Refer to the Mute Attenuation vs Mute Current curves in the TYPICAL PERFORMANCE
CHARACTERISTICS section for values of attenuation per current out of pins 6 or 11. The resistance R
M
is
calculated by the following equation:
R
M
≤ (|−V
EE
| − 2.6V)/I
pin6
where
• I
pin6
= I
pin11
≥ 0.5mA. (1)
Both pins 6 and 11 can be tied together so that only one resistor and capacitor are required for the mute
function. The mute resistance must be chosen such that greater than 1mA is pulled through the resistor R
M
so
that each amplifier is fully pulled out of mute mode. Taking into account supply line fluctuations, it is a good idea
to pull out 1mA per mute pin or 2 mA total if both pins are tied together.
UNDER-VOLTAGE PROTECTION
Upon system power-up, the under-voltage protection circuitry allows the power supplies and their corresponding
capacitors to come up close to their full values before turning on the LM4766 such that no DC output spikes
occur. Upon turn-off, the output of the LM4766 is brought to ground before the power supplies such that no
transients occur at power-down.
OVER-VOLTAGE PROTECTION
The LM4766 contains over-voltage protection circuitry that limits the output current to approximately 4.0A
PK
while
also providing voltage clamping, though not through internal clamping diodes. The clamping effect is quite the
same, however, the output transistors are designed to work alternately by sinking large current spikes.
SPiKe PROTECTION
The LM4766 is protected from instantaneous peak-temperature stressing of the power transistor array. The Safe
Operating graph in the TYPICAL PERFORMANCE CHARACTERISTICS section shows the area of device
operation where SPiKe Protection Circuitry is not enabled. The waveform to the right of the SOA graph
exemplifies how the dynamic protection will cause waveform distortion when enabled. Please refer to AN-898 for
more detailed information.
THERMAL PROTECTION
The LM4766 has a sophisticated thermal protection scheme to prevent long-term thermal stress of the device.
When the temperature on the die reaches 165°C, the LM4766 shuts down. It starts operating again when the die
temperature drops to about 155°C, but if the temperature again begins to rise, shutdown will occur again at
165°C. Therefore, the device is allowed to heat up to a relatively high temperature if the fault condition is
temporary, but a sustained fault will cause the device to cycle in a Schmitt Trigger fashion between the thermal
shutdown temperature limits of 165°C and 155°C. This greatly reduces the stress imposed on the IC by thermal
cycling, which in turn improves its reliability under sustained fault conditions.
Since the die temperature is directly dependent upon the heat sink used, the heat sink should be chosen such
that thermal shutdown will not be reached during normal operation. Using the best heat sink possible within the
cost and space constraints of the system will improve the long-term reliability of any power semiconductor
device, as discussed in the DETERMINING THE CORRECT HEAT SINK section.
DETERMlNlNG MAXIMUM POWER DISSIPATION
Power dissipation within the integrated circuit package is a very important parameter requiring a thorough
understanding if optimum power output is to be obtained. An incorrect maximum power dissipation calculation
may result in inadequate heat sinking causing thermal shutdown and thus limiting the output power.
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