Datasheet

OBSOLETE
LM4550
SNAS032F –SEPTEMBER 2001–REVISED APRIL 2013 www.ti.com
SDATA_IN: Slot 0 – Codec/Slot Status Bits
The first bit (bit 15, “Codec Ready”) of slot 0 in the AC Link Input Frame indicates when the codec's AC Link
digital interface and its status/control registers are fully operational. The digital controller is then able to read the
LSBs from the Powerdown Control/Stat register (26h) to determine the status of the four main analog
subsections. It is important to check the status of these subsections after Initialization, Cold Reset or the use of
the powerdown modes in order to minimize the risk of distorting analog signals passed before the subsections
are ready.
The 4 bits 14, 13, 12 and 11 indicate that the data in slots 1, 2, 3 and 4, respectively, are valid.
Table 12. SLOT 0, INPUT FRAME
Bit Description Comment
15 Codec Ready Bit 1 = AC Link Interface Ready
14 Slot 1 data valid 1 = Valid Status Address or Slot Request
13 Slot 2 data valid 1 = Valid Status Data
1 = Valid PCM Data
12 Slot 3 data valid
(Left ADC)
1 = Valid PCM Data
11 Slot 4 data valid
(Right ADC)
SDATA_IN: Slot 1 – Status Address / Slot Request Bits
This slot echoes (in bits 18 – 12) the 7-bit address of the codec control/status register received from the
controller as part of a read-request in the previous frame. If no read-request was received, the codec stuffs these
bits with zeros.
The 6 bits 11, 10, 8 – 5 are Slot Request bits that support the Variable Rate Audio (VRA) capabilities of the
LM4550. Only two are used simultaneously. If the codec is in Primary mode or Secondary mode 1, then the left
and right channels of the DAC take PCM data from slots 3 and 4 in the Output Frame respectively (see
Table 19). The codec uses bits 11 and 10 to request DAC data from these two slots. If bits 11 and 10 are set to
0, the controller should respond with valid PCM data in slots 3 and 4 of the next Output Frame. If bits 11 and 10
are set to 1, the controller should not send data. Similarly, if the codec is in Secondary mode 2, bits 7 and 6 are
used to request data from slots 7 and 8 in the Output Frame. If in Secondary mode 3, bits 8 and 5 request data
from slots 6 and 9.
The codec has full control of the slot request bits. By default, data is requested in every frame, corresponding to
a sample rate equal to the frame rate (SYNC frequency) – 48 kHz when XTAL_IN = 24.576 MHz. To send
samples at a rate below the frame rate, a controller should set VRA = 1 (bit 0 in the Extended Audio
Control/Status register, 2Ah) and program the desired rate into the PCM DAC Rate register, 2Ch. Both DAC
channels operate at the same sample rate. Values for common sample rates are given in the Register
Description section (Sample Rate Control Registers, 2Ch, 32h) but any rate between 4 kHz and 48 kHz (to a
resolution of 1 Hz) is supported. Slot Requests from the LM4550 are issued completely deterministically. For
example if a sample rate of 8000 Hz is programmed into 2Ch then the LM4550 will always issue a slot request in
every sixth frame. A frequency of 9600 Hz will result in a request every fifth frame while a frequency of 8800 Hz
will cause slot requests to be spaced alternately five and six frames apart. This determinism makes it easy to
plan task scheduling on a system controller and simplifies application software development.
The LM4550 will ignore data in Output Frame slots that do not follow an Input Frame with a Slot Request. For
example, if the LM4550 is expecting data at a 8000 Hz rate yet the AC '97 Digital Audio Controller continues to
send data at 48000 Hz, then only those one-in-six audio samples that follow a Slot Request will be used by the
DAC. The rest will be discarded.
Bits 9, 4, 3, and 2 are request bits for slots not used by the LM4550 and are stuffed with zeros. Bits 1 and 0 are
reserved and are also stuffed with zeros.
Table 13. SLOT 1, INPUT FRAME
Bits Description Comment
19 Reserved Stuffed with "0" by LM4550
18:12 Status Register Index Echo of the requested Status Register address.
24 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated
Product Folder Links: LM4550