Datasheet

SLOT #
SYNC
AC LINK
OUTPUT
FRAMES:
SDATA_OUT
0 1 2 3 4 65 7 1098 11 12
RSRVTAG
CMD
ADR
CMD
DATA
PCM
LEFT
PCM
RIGHT
RSRVRSRV RSRV RSRVRSRV RSRV RSRV
AC LINK INPUT
FRAMES:
SDATA_IN
RSRVTAG
STAT
ADR
STAT
DATA
PCM
LEFT
PCM
RIGHT
RSRVRSRV RSRV RSRVRSRV RSRV RSRV
Codec ID: to select target codec in multiple codec configurations
Slot Request bits, 11 & 10: to request data from Output Frame slots 3 & 4
TAG
PHASE
DATA PHASE
LM4549B
SNAS598A –JULY 2012–REVISED MAY 2013 www.ti.com
Stereo Outputs
The output volume from LINE_OUT and LNLVL_OUT can be muted or adjusted by 0 dB to 45 dB in nominal 3
dB steps under the control of the output volume registers Master Volume (02h) and Line Level Volume (04h)
respectively. As with the input volume registers, adjustments to the levels of the two stereo channels can be
made independently but both left and right channels share a mute bit (D15).
Mono Output
The mono output (MONO_OUT) is driven by one of two signals selected by the MIX bit (D9) in the General
Purpose register, 20h. The signal selected by default (MIX = 0) is the mono summation of the two channels of
Stereo Mix 3D, the stereo output of the mixer MIX1. Setting the control bit MIX = 1, selects a microphone input,
MIC1 or MIC2. The choice of microphone is controlled by the Microphone Select (MS) bit (D8) also in the
General Purpose register, 20h.
Analog Loopthrough and Digital Loopback
Analog Loopthrough refers to an all-analog signal path from an analog input through the mixers to an analog
output. Digital Loopback refers to a mixed-mode analog and digital signal path from an analog input through the
ADC, looped-back (LPBK bit – D7, 20h) through the DAC and mixers to an analog output. This is an 18 bit digital
loopback at 48 kHz, bypassing the the SRC logic even if an SRC rate other than 48 kHz is selected.
Resets
COLD RESET is performed when RESET# (pin 11) is pulled low for > 1 µs. It is a complete reset. All registers
and internal circuits are reset to their default state. It is the only reset which clears the ATE and Vendor test
modes.
WARM RESET is performed when SYNC (pin 10) is held high for > 1 µs and the codec AC Link digital interface
is in powerdown (PR4 = 1, Powerdown Control / Status register, 26h). It is used to clear PR4 and power up the
AC Link digital interface but otherwise does not change the contents of any internal circuitry.
REGISTER RESET is performed when any value is written to the RESET register, 00h. It resets all registers to
their default state and will modify circuit configurations accordingly but does not reset any other internal circuits.
AC Link Serial Interface Protocol
Figure 17. AC Link Bidirectional Audio Frame
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