Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLinear ICsLM4549BVH/NOPB

LM4549B

www.ti.com

SNAS598A –JULY 2012–REVISED MAY 2013

DIGITAL I/O AND CLOCKING (continued)

Name Pin I / O Functional Description

AC Link frame marker and Warm Reset

This input defines the boundaries of AC Link frames. Each frame lasts 256 periods of BIT_CLK. In

normal operation SYNC is a 48 kHz positive pulse with a duty cycle of 6.25% (16/256). SYNC is

sampled on the falling edge of BIT_CLK and the codec takes the first positive sample of SYNC as

SYNC 10 I

defining the start of a new AC Link frame. If a subsequent SYNC pulse occurs within 255 BIT_CLK

periods of the frame start it will be ignored.

SYNC is also used as an active high input to perform an (asynchronous) Warm Reset. Warm Reset is

used to clear a power down state on the codec AC Link interface.

Cold Reset

This active low signal causes a hardware reset which returns the control registers and all internal

circuits to their default conditions. RESET# MUST be used to initialize the LM4549B after Power On

RESET# 11 I

when the supplies have stabilized. Cold Reset also clears the codec from both ATE and Vendor test

modes. In addition, while active, it switches the PC_BEEP mono input directly to both channels of the

LINE_OUT stereo output.

Codec Identity

ID1# and ID0# determine the Codec Identity for multiple codec use. The Codec Identity configures the

codec in either Primary or one of three Secondary Codec modes. These Identity pins are of inverted

ID0# 45 I polarity relative to the Codec Identity bits ID1, ID0 (bits D15, D14) in the read-only Extended Audio ID

to “1”. Similarly, connection to DV

will set the ID0 bit to “0”. If left open (NC), ID0# is pulled high by

an internal pull-up resistor.

Codec Identity

ID1# and ID0# determine the codec address for multiple codec use. The Codec Identity configures the

codec in either Primary or one of three Secondary Codec modes. These Identity pins are of inverted

ID1# 46 I polarity relative to the Codec Identity bits ID1, ID0 (bits D15, D14) in the read-only Extended Audio ID

to “1”. Similarly, connection to DV

will set the ID1 bit to “0”. If left open (NC), ID1# is pulled high by

an internal pull-up resistor.

External Amplifier Power Down control signal

This output is set by the EAPD bit (bit D15) in the Powerdown Control/ Status register, 26h. As with

EAPD 47 O the other logic outputs, the output voltage is set by DV

. This pin is intended to be connected to the

shutdown pin on an external power amplifier. For normal operation the default value of EAPD = 0 will

enable the external amplifier allowing an input on PC_BEEP to be heard during Cold Reset.

POWER SUPPLIES AND REFERENCES

Name Pin I / O Functional Description

25 I Analog supply

26 I Analog ground

DD1

1 I Digital supply

DD2

9 I Digital supply

SS1

4 I Digital ground

SS2

7 I Digital ground

Nominal 2.2 V internal reference

REF

27 O Not intended to sink or source current. Use short traces to bypass (3.3µF, 0.1µF) this pin to maximize

codec performance. See text.

Nominal 2.2 V reference output

REF_OUT

28 O

Can source up to 5 mA of current and can be used to bias a microphone.

3D SOUND AND NO-CONNECTS (NC)

Name Pin I / O Functional Description

These pins are used to complete the TI 3D Sound stereo enhancement circuit. Connect a 0.022 µF

capacitor between pins 3DP and 3DN. TI 3D Sound can be turned on and off via the 3D bit (D13) in

3DP, 3DN 33,34 O the General Purpose register, 20h. TI 3D Sound uses a fixed-depth type stereo enhancement circuit

hence the 3D Control register, 22h is read-only and is not programmable. If TI 3D Sound is not

needed, these pins should be left open (NC).

29, 30

31, 32 These pins are not used and should be left open (NC).

NC 38, 40 NC For second source applications these pins may be connected to a noise-free supply or ground (e.g.

42, 43 AV

or AV

), either directly or through a capacitor.

44, 48

Product Folder Links: LM4549B