Datasheet

LM4050-N, LM4050-N-Q1
SNOS455E –MAY 2000–REVISED APRIL 2013 www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)(2)
Reverse Current 20 mA
Forward Current 10 mA
Power Dissipation (T
A
= 25°C)
(3)
DBZ Package 280 mW
Storage Temperature −65°C to +150°C
Vapor phase (60 seconds) +215°C
Lead Temperature DBZ Package
Infrared (15 seconds) +220°C
Human Body Model
(4)
2 kV
ESD Susceptibility
Machine Model
(4)
200V
See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” for other methods of soldering surface mount devices.
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see
the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics
may degrade when the device is not operated under the listed test conditions.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) The maximum power dissipation must be derated at elevated temperatures and is dictated by T
Jmax
(maximum junction temperature),
θ
JA
(junction to ambient thermal resistance), and T
A
(ambient temperature). The maximum allowable power dissipation at any
temperature is PD
max
= (T
Jmax
− T
A
)/θ
JA
or the number given in the Absolute Maximum Ratings, whichever is lower. For the LM4050-N,
T
Jmax
= 125°C, and the typical thermal resistance (θ
JA
), when board mounted, is 326°C/W for the SOT-23 package.
(4) The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF
capacitor discharged directly into each pin.
Operating Ratings
(1)
Temperature Range (T
min
≤ T
A
≤ T
max
)
Industrial Temperature Range −40°C ≤ T
A
≤ +85°C
Extended temperature Range −40°C ≤ T
A
≤ +125°C
LM4050-N-2.0, 60 μA to 15 mA
LM4050-N-2.5 60 μA to 15 mA
LM4050-N-4.1 68 μA to 15 mA
Reverse Current
LM4050-N-5.0 74 μA to 15 mA
LM4050-N-8.2 91 μA to 15 mA
LM4050-N-10.0 100 μA to 15 mA
(1) The maximum power dissipation must be derated at elevated temperatures and is dictated by T
Jmax
(maximum junction temperature),
θ
JA
(junction to ambient thermal resistance), and T
A
(ambient temperature). The maximum allowable power dissipation at any
temperature is PD
max
= (T
Jmax
− T
A
)/θ
JA
or the number given in the Absolute Maximum Ratings, whichever is lower. For the LM4050-N,
T
Jmax
= 125°C, and the typical thermal resistance (θ
JA
), when board mounted, is 326°C/W for the SOT-23 package.
2 Submit Documentation Feedback Copyright © 2000–2013, Texas Instruments Incorporated
Product Folder Links: LM4050-N LM4050-N-Q1