Datasheet

Table 2-9. Interrupts (continued)
DescriptionVector Address or
Offset
Interrupt Number (Bit
in Interrupt Registers)
Vector Number
Timer 1B0x0000.00982238
Timer 2A0x0000.009C2339
Timer 2B0x0000.00A02440
Analog Comparator 00x0000.00A42541
Reserved-26-2742-43
System Control0x0000.00B02844
Flash Memory Control0x0000.00B42945
GPIO Port F0x0000.00B83046
GPIO Port G0x0000.00BC3147
Reserved-32-3448-50
Timer 3A0x0000.00CC3551
Timer 3B0x0000.00D03652
Reserved-3753
QEI10x0000.00D83854
CAN00x0000.00DC3955
Reserved-40-4156-57
Ethernet Controller0x0000.00E84258
Hibernation Module0x0000.00EC4359
2.5.3 Exception Handlers
The processor handles exceptions using:
■ Interrupt Service Routines (ISRs). Interrupts (IRQx) are the exceptions handled by ISRs.
■ Fault Handlers. Hard fault, memory management fault, usage fault, and bus fault are fault
exceptions handled by the fault handlers.
■ System Handlers. NMI, PendSV, SVCall, SysTick, and the fault exceptions are all system
exceptions that are handled by system handlers.
2.5.4 Vector Table
The vector table contains the reset value of the stack pointer and the start addresses, also called
exception vectors, for all exception handlers. The vector table is constructed using the vector address
or offset shown in Table 2-8 on page 85. Figure 2-6 on page 88 shows the order of the exception
vectors in the vector table. The least-significant bit of each vector must be 1, indicating that the
exception handler is Thumb code
87June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.