Datasheet

Table 2-8. Exception Types (continued)
ActivationVector Address or
Offset
b
Priority
a
Vector
Number
Exception Type
Synchronous when precise and
asynchronous when imprecise
0x0000.0014programmable
c
5Bus Fault
Synchronous0x0000.0018programmable
c
6Usage Fault
Reserved--7-10-
Synchronous0x0000.002Cprogrammable
c
11SVCall
Synchronous0x0000.0030programmable
c
12Debug Monitor
Reserved--13-
Asynchronous0x0000.0038programmable
c
14PendSV
Asynchronous0x0000.003Cprogrammable
c
15SysTick
Asynchronous0x0000.0040 and aboveprogrammable
d
16 and aboveInterrupts
a. 0 is the default priority for all the programmable priorities.
b. See “Vector Table” on page 87.
c. See SYSPRI1 on page 137.
d. See PRIn registers on page 123.
Table 2-9. Interrupts
DescriptionVector Address or
Offset
Interrupt Number (Bit
in Interrupt Registers)
Vector Number
Processor exceptions0x0000.0000 -
0x0000.003C
-0-15
GPIO Port A0x0000.0040016
GPIO Port B0x0000.0044117
GPIO Port C0x0000.0048218
GPIO Port D0x0000.004C319
GPIO Port E0x0000.0050420
UART00x0000.0054521
UART10x0000.0058622
SSI00x0000.005C723
I
2
C00x0000.0060824
PWM Fault0x0000.0064925
PWM Generator 00x0000.00681026
PWM Generator 10x0000.006C1127
PWM Generator 20x0000.00701228
QEI00x0000.00741329
ADC0 Sequence 00x0000.00781430
ADC0 Sequence 10x0000.007C1531
ADC0 Sequence 20x0000.00801632
ADC0 Sequence 30x0000.00841733
Watchdog Timer 00x0000.00881834
Timer 0A0x0000.008C1935
Timer 0B0x0000.00902036
Timer 1A0x0000.00942137
June 18, 201286
Texas Instruments-Production Data
The Cortex-M3 Processor
NRND: Not recommended for new designs.