Datasheet

Figure 23-1. Load Conditions
C
L
= 50 pF
GND
pin
23.2.2 Clocks
Table 23-9. Phase Locked Loop (PLL) Characteristics
UnitMaxNomMinParameter NameParameter
MHz8.192-3.579545Crystal reference
a
f
ref_crystal
MHz8.192-3.579545External clock reference
a
f
ref_ext
MHz-400-PLL frequency
b
f
pll
ms0.5--PLL lock timeT
READY
a. The exact value is determined by the crystal value programmed into the XTAL field of the Run-Mode Clock Configuration
(RCC) register.
b. PLL frequency is automatically calculated by the hardware based on the XTAL field of the RCC register.
Table 23-10 on page 752 shows the actual frequency of the PLL based on the crystal frequency used
(defined by the XTAL field in the RCC register).
Table 23-10. Actual PLL Frequency
ErrorPLL Frequency (MHz)Crystal Frequency (MHz)XTAL
0.0023%400.9043.57950x4
0.0047%398.13123.68640x5
-4004.00x6
0.0035%401.4084.0960x7
0.0047%398.13124.91520x8
-4005.00x9
0.0016%399.365.120xA
-4006.00xB
0.0016%399.366.1440xC
0.0047%398.13127.37280xD
0.0047%4008.00xE
0.0033%398.67733338.1920xF
Table 23-11. Clock Characteristics
UnitMaxNomMinParameter NameParameter
MHz15.6128.4Internal 12 MHz oscillator frequencyf
IOSC
KHz453015Internal 30 KHz oscillator frequencyf
IOSC30KHZ
MHz-4.194304-Hibernation module oscillator frequencyf
XOSC
MHz-4.194304-Crystal reference for hibernation oscillatorf
XOSC_XTAL
June 18, 2012752
Texas Instruments-Production Data
Electrical Characteristics
NRND: Not recommended for new designs.