Datasheet

21.2.2 Signals by Signal Name
Table 21-6. Signals by Signal Name
DescriptionBuffer Type
a
Pin TypePin NumberPin Name
Analog-to-digital converter input 0.AnalogIB1ADC0
Analog-to-digital converter input 1.AnalogIA1ADC1
Analog-to-digital converter input 2.AnalogIB3ADC2
Analog-to-digital converter input 3.AnalogIB2ADC3
Analog comparator 0 positive input.AnalogIA7C0+
Analog comparator 0 negative input.AnalogIA6C0-
Analog comparator 0 output.TTLOB7C0o
CAN module 0 receive.TTLIG1CAN0Rx
CAN module 0 transmit.TTLOG2CAN0Tx
Capture/Compare/PWM 0.TTLI/OE1CCP0
Capture/Compare/PWM 1.TTLI/OL6CCP1
CPU Mode bit 0. Input must be set to logic 0 (grounded); other
encodings reserved.
TTLIE11CMOD0
CPU Mode bit 1. Input must be set to logic 0 (grounded); other
encodings reserved.
TTLIB10CMOD1
12.4-kΩ resistor (1% precision) used internally for Ethernet
PHY.
AnalogIK3ERBIAS
PWM Fault.TTLIF2Fault
Ground reference for logic and I/O pins.Power-B6
C4
C5
F10
F11
F12
H3
J3
J10
K5
K6
K10
L10
GND
The ground reference for the analog circuits (ADC, Analog
Comparators, etc.). These are separated from GND to
minimize the electrical noise contained on VDD from affecting
the analog functions.
Power-A5
B5
GNDA
GND of the Ethernet PHY.Power-C8
C9
K4
GNDPHY
An open-drain output with internal pull-up that indicates the
processor is in Hibernate mode.
ODOM12HIB
I
2
C module 0 clock.ODI/OC11I2C0SCL
I
2
C module 0 data.ODI/OC12I2C0SDA
QEI module 0 index.TTLIF1IDX0
QEI module 1 index.TTLIH12IDX1
June 18, 2012736
Texas Instruments-Production Data
Signal Tables
NRND: Not recommended for new designs.