Datasheet
Table 21-1. Signals by Pin Number (continued)
DescriptionBuffer Type
a
Pin TypePin NamePin Number
GPIO port D bit 3.TTLI/OPD3
13
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
TTLOU1Tx
Positive supply for most of the logic function, including the
processor core and most peripherals.
Power-VDD25
14
Ground reference for logic and I/O pins.Power-GND
15
Ethernet PHY XTALP 25-MHz oscillator crystal input or external
clock reference input.
TTLIXTALPPHY
16
Ethernet PHY XTALN 25-MHz oscillator crystal output. Connect
this pin to ground when using a single-ended 25-MHz clock input
connected to the XTALPPHY pin.
TTLOXTALNPHY
17
GPIO port G bit 1.TTLI/OPG1
18
PWM 1. This signal is controlled by PWM Generator 0.TTLOPWM1
GPIO port G bit 0.TTLI/OPG0
19
Positive supply for I/O and some logic.Power-VDD
20
Ground reference for logic and I/O pins.Power-GND
21
GPIO port C bit 7.TTLI/OPC7
22
GPIO port C bit 6.TTLI/OPC6
23
QEI module 0 phase B.TTLIPhB0
GPIO port C bit 5.TTLI/OPC5
24
GPIO port C bit 4.TTLI/OPC4
25
QEI module 0 phase A.TTLIPhA0
GPIO port A bit 0.TTLI/OPA0
26
UART module 0 receive. When in IrDA mode, this signal has IrDA
modulation.
TTLIU0Rx
GPIO port A bit 1.TTLI/OPA1
27
UART module 0 transmit. When in IrDA mode, this signal has IrDA
modulation.
TTLOU0Tx
GPIO port A bit 2.TTLI/OPA2
28
SSI module 0 clockTTLI/OSSI0Clk
GPIO port A bit 3.TTLI/OPA3
29
SSI module 0 frame signalTTLI/OSSI0Fss
GPIO port A bit 4.TTLI/OPA4
30
SSI module 0 receiveTTLISSI0Rx
GPIO port A bit 5.TTLI/OPA5
31
SSI module 0 transmitTTLOSSI0Tx
Positive supply for I/O and some logic.Power-VDD
32
Ground reference for logic and I/O pins.Power-GND
33
GPIO port A bit 6.TTLI/OPA6
34
Capture/Compare/PWM 1.TTLI/OCCP1
GPIO port A bit 7.TTLI/OPA7
35
VCC of the Ethernet PHY.Power-VCCPHY
36
RXIN of the Ethernet PHY.AnalogIRXIN
37
719June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.