Datasheet

13 Synchronous Serial Interface (SSI) .................................................................... 476
13.1 Block Diagram ............................................................................................................ 476
13.2 Signal Description ....................................................................................................... 476
13.3 Functional Description ................................................................................................. 477
13.3.1 Bit Rate Generation ..................................................................................................... 477
13.3.2 FIFO Operation ........................................................................................................... 478
13.3.3 Interrupts .................................................................................................................... 478
13.3.4 Frame Formats ........................................................................................................... 478
13.4 Initialization and Configuration ..................................................................................... 486
13.5 Register Map .............................................................................................................. 487
13.6 Register Descriptions .................................................................................................. 488
14 Inter-Integrated Circuit (I
2
C) Interface ................................................................ 514
14.1 Block Diagram ............................................................................................................ 515
14.2 Signal Description ....................................................................................................... 515
14.3 Functional Description ................................................................................................. 515
14.3.1 I
2
C Bus Functional Overview ........................................................................................ 516
14.3.2 Available Speed Modes ............................................................................................... 518
14.3.3 Interrupts .................................................................................................................... 519
14.3.4 Loopback Operation .................................................................................................... 519
14.3.5 Command Sequence Flow Charts ................................................................................ 519
14.4 Initialization and Configuration ..................................................................................... 527
14.5 Register Map .............................................................................................................. 528
14.6 Register Descriptions (I
2
C Master) ............................................................................... 529
14.7 Register Descriptions (I
2
C Slave) ................................................................................. 542
15 Controller Area Network (CAN) Module ............................................................. 551
15.1 Block Diagram ............................................................................................................ 552
15.2 Signal Description ....................................................................................................... 552
15.3 Functional Description ................................................................................................. 553
15.3.1 Initialization ................................................................................................................. 554
15.3.2 Operation ................................................................................................................... 554
15.3.3 Transmitting Message Objects ..................................................................................... 555
15.3.4 Configuring a Transmit Message Object ........................................................................ 555
15.3.5 Updating a Transmit Message Object ........................................................................... 557
15.3.6 Accepting Received Message Objects .......................................................................... 557
15.3.7 Receiving a Data Frame .............................................................................................. 557
15.3.8 Receiving a Remote Frame .......................................................................................... 558
15.3.9 Receive/Transmit Priority ............................................................................................. 558
15.3.10 Configuring a Receive Message Object ........................................................................ 559
15.3.11 Handling of Received Message Objects ........................................................................ 560
15.3.12 Handling of Interrupts .................................................................................................. 563
15.3.13 Test Mode ................................................................................................................... 563
15.3.14 Bit Timing Configuration Error Considerations ............................................................... 565
15.3.15 Bit Time and Bit Rate ................................................................................................... 565
15.3.16 Calculating the Bit Timing Parameters .......................................................................... 567
15.4 Register Map .............................................................................................................. 570
15.5 CAN Register Descriptions .......................................................................................... 572
7June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.