Datasheet

Register 19: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C
Register 20: PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C
Register 21: PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC
These registers provide the current set of interrupt sources that are asserted to the controller
(PWM0ISC controls the PWM generator 0 block, and so on). Bits set to 1 indicate the latched events
that have occurred; bits set to 0 indicate that the event in question has not occurred. These are
R/W1C registers; writing a 1 to a bit position clears the corresponding interrupt reason.
PWM0 Interrupt Status and Clear (PWM0ISC)
Base 0x4002.8000
Offset 0x04C
Type R/W1C, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
IntCntZeroIntCntLoad
IntCmpAUIntCmpADIntCmpBUIntCmpBD
reserved
R/W1CR/W1CR/W1CR/W1CR/W1CR/W1CROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved31:6
Comparator B Down Interrupt
Indicates that the counter has matched the comparator B value while
counting down.
0R/W1CIntCmpBD5
Comparator B Up Interrupt
Indicates that the counter has matched the comparator B value while
counting up.
0R/W1CIntCmpBU4
Comparator A Down Interrupt
Indicates that the counter has matched the comparator A value while
counting down.
0R/W1CIntCmpAD3
Comparator A Up Interrupt
Indicates that the counter has matched the comparator A value while
counting up.
0R/W1CIntCmpAU2
Counter=Load Interrupt
Indicates that the counter has matched the PWMnLOAD register.
0R/W1CIntCntLoad1
Counter=0 Interrupt
Indicates that the counter has matched 0.
0R/W1CIntCntZero0
June 18, 2012684
Texas Instruments-Production Data
Pulse Width Modulator (PWM)
NRND: Not recommended for new designs.