Datasheet

Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018
This register provides the current set of interrupt sources that are asserted, regardless of whether
they cause an interrupt to be asserted to the controller. The fault interrupt is latched on detection;
it must be cleared through the PWM Interrupt Status and Clear (PWMISC) register (see page 676).
The PWM generator interrupts simply reflect the status of the PWM generators; they are cleared
via the interrupt status register in the PWM generator blocks. Bits set to 1 indicate the events that
are active; zero bits indicate that the event in question is not active.
PWM Raw Interrupt Status (PWMRIS)
Base 0x4002.8000
Offset 0x018
Type RO, reset 0x0000.0000
16171819202122232425262728293031
IntFault
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
IntPWM0IntPWM1IntPWM2reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved31:17
Fault Interrupt Asserted
Indicates that the fault input is asserting.
0ROIntFault16
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved15:3
PWM2 Interrupt Asserted
Indicates that the PWM generator 2 block is asserting its interrupt.
0ROIntPWM22
PWM1 Interrupt Asserted
Indicates that the PWM generator 1 block is asserting its interrupt.
0ROIntPWM11
PWM0 Interrupt Asserted
Indicates that the PWM generator 0 block is asserting its interrupt.
0ROIntPWM00
675June 18, 2012
Texas Instruments-Production Data
Stellaris
®
LM3S8962 Microcontroller
NRND: Not recommended for new designs.