Datasheet

Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014
This register controls the global interrupt generation capabilities of the PWM module. The events
that can cause an interrupt are the fault input and the individual interrupts from the PWM generators.
PWM Interrupt Enable (PWMINTEN)
Base 0x4002.8000
Offset 0x014
Type R/W, reset 0x0000.0000
16171819202122232425262728293031
IntFault
reserved
R/WROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
IntPWM0IntPWM1IntPWM2reserved
R/WR/WR/WROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved31:17
Fault Interrupt Enable
When set, an interrupt occurs when the fault input is asserted.
0R/WIntFault16
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x00ROreserved15:3
PWM2 Interrupt Enable
When set, an interrupt occurs when the PWM generator 2 block asserts
an interrupt.
0R/WIntPWM22
PWM1 Interrupt Enable
When set, an interrupt occurs when the PWM generator 1 block asserts
an interrupt.
0R/WIntPWM11
PWM0 Interrupt Enable
When set, an interrupt occurs when the PWM generator 0 block asserts
an interrupt.
0R/WIntPWM00
June 18, 2012674
Texas Instruments-Production Data
Pulse Width Modulator (PWM)
NRND: Not recommended for new designs.